Research On IC Verification Methodology And Verification For AVS Video Decoder

Verification for digital design is more and more important as the increasing of design scale and complexity of integrated circuit, even reaches 70% of the development cycle. It is also more and more difficult and becoming the bottleneck of the digital development. The engineers are focusing on how to build a powerful and efficient verification platform. With this reason, the IC verification methodologies are studied and the AVS video decoder is verified in this paper.The common senior verification methodologies are studied in this paper, including RVM (Reference Verification Methodology), VMM (Verification Methodology Manual), AVM (Advanced Verification Methodology) and OVM (Open Verification Methodology). The common verification languages are also introduced. Then, based on RVM, a hierarchical verification platform is built with Vera to verify the AVS video decoder. When it is finished, the FPGA (field-programmable gate array) verification for AVS video decoder is accomplished on the FPGA chip xc5vlx220 of Xilinx Company. In this paper,2400 test cases are developed for AVS video decoder, the code coverage fulfills the requirements of project, the line coverage is 99.2%, the condition coverage is 95%, the fsm coverage is 98.1% and the toggle coverage is 95.2%. The reusability of the platform is fine.The image data that is processed by FPGA can be converted into significative images. A high PSNR of this 720*576 image with the block size 8×8 is obtained, which is 27.2dB and illustrates the decoded image has high quality. It indicates that the decoder has a good performance. The results show that using Vera and FPGA can verify the ASIC (Application Specific Integrated Circuit) efficiently and accurately.