Fpga Based Evolvable Hardware To Solve Ultra-high-dimensional Linear Equations

Sometimes we will encounter the problem of solving linear equations during the computation of science engineering and mathematics research often, some of the dimension of the equations are quite large, while the traditional method using the numerical algebra solving the equations has great difficulty. With the continuous development of computer technology, solving super-high dimension linear equations is very important. The advantages and disadvantages of the algorithm for solving the super-high-dimension linear equations, the speed and the accuracy of the solving has a direct impact on solving these scientific problems. There are many disadvantages by using the traditional mathematical methods during solving the super-high dimension linear equations, such as slow speed and low precision, in this paper proposed a hardware algorithm based on evolvable hardware for solving super-high dimension linear equation group, and implemented on the FPGA. The experiments shows that it can converge to the optimal solution faster and the optimal solution solved are more accurate by using this method, compared with traditional mathematics methods.The innovation of this paper are as follows:(1)Combined the feature of powerful optimal solution search of evolutionary algorithm with solving super-high dimensional linear equations group together, a new algorithm for solving super-high dimension linear equation group based on evolutionary algorithms is proposed. According to the evolutionary algorithms, this algorithm accomplished solving super-high dimension linear equation group through initialization, fitness calculation, selection, crossover and mutation operations, this algorithm has high accuracy, and can overcome the shortcomings of great error which brought out by using traditional mathematics solving.(2)Used the methods of implemented on hardware of evolvable FPGA (Field Programmable Gate Array),this paper according to the internal structure of FPGA, mating with the characteristics of its gate circuit, encoding the solution of the equation group with binary, make great enhancement of the accuracy through select the appropriate crossover probability and mutation probability. In addition, the speed is faster than the traditional methods since this method solving the equation on the hardware.(3)According to idea of sub-module of evolvable hardware, we divided the whole process of solution into several modules, and then make specific design for each module, at last complete simulation for each module and the entire system on the integrated environment ISE10.1 which produced by Xilinx to verify the correctness of the design.(4)Accomplished the design and realization of the solving super-high dimension linear equation group FPGA chip according to the idea of evolvable hardware which was proposed in this paper, experiments shows that use this chip to solve super-high dimension linear equation groups not only can improve the of the accuracy, but also greatly improved the speed, saving the computation time, and make the foundation for future applications.