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Based On The Dynamic Zero Compensation For Low Dropout Linear Regulator Chip Research And Design

Posted on:2008-12-29Degree:MasterType:Thesis
Country:ChinaCandidate:J J WangFull Text:PDF
GTID:2192360215965007Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Based on analyzing the stability of a normal negative feed-back system, this paper studied the stability of LDO (Low Dropout Linear Regulator) deeply and made a design with stability dynamic zero compensation.Firstly, modeled the AC small signal equivalent models of LDO, based on this model, using the method of Fouries analysis in frequency domain, evaluated the closed transmit function of LDO. During analyzing the pole- zero point of the system, we found that the position of the main pole-point (fpo=λIL/2πCout)of LDO will be changed when the load current changed, the changing of load current will made LDO oscillate any time. Aimed to this situation, this paper gived out a dynamic zero compensation method of LDO's stability, the main idea of this method is employing switch resistor and parasitical capacitor of MOSFET to constitute dynamic zero compensation network, applying sampled current of load current to regulate the state of MOSFET to change the value of these resistors and capacitors, so the dynamic compensation zero-point produced by the dynamic zero compensation network eliminates the influence to LDO's stability, which produced by the change of the load current value, so the stability of LDO is irrelevant to the value of the load current.After that, this paper using the compensation method above on designed a high-performance and high-stability LDO chip based on UMC 0.6um BiCMOS process, which can be used to all kinds of wireless communication equipments.At last, this paper tested the stability and simulated the performance parameter of the design, the simulation results indicated that under the situation of different load current from 0 to 150mA, the curves of the closed transmit function of the chip changed slightly, so this chip has higher stability; the results of the performance parameter simulated as follows: the output voltage is 2.5V±0.15%; the maximum dropout voltage is 65mV; the maximum working output current is 150mA; the maximum quiescent current is 163uA; the maximum short circuit current is 620mA; the maximum response time is 200us; the lining regulation error is 0.02%/V; the load regulation error is 0.0008%/mA; the output noise density is 0.9uV/(Hz)1/2; the PSRR is 75dB at low frequency segment; AC lining regulation is 0.73mVP-P; the temperature of thermal shutdown is 160℃; the voltage of under voltage lockout is 2.43V.
Keywords/Search Tags:Low Dropout Linear Regulator, Dynamic zero Compensation, Stability
PDF Full Text Request
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