Jpeg2000 Hardware Design Based On High-speed Dsp And Implementation

Compression of a digital image play an important role in military and civil field.The JPEG2000 is a new generation standard of still image compression. It can perform low bit rate image compression under the condition that the assurance of rate distortion and subjective image quantity being better than the existing standard. A hardware design and achieve way of JPEG2000 based on DSP is studied in this paper. Firstly, the JPEG2000 encoder and decoder system whose core algorithm is EBCOT is studied, and the algorithm is programmed in C language and tested on PC. Secondly, a general image encoder and decoder hardware system is designed, where TI's TMS320C6204 DSP chip is chosen as its key processor. Finally, the JPEG2000 system is migrated on DSP. The key problems such as work flow, the selection of hardware source, the high-speed board design and methods of code optimization, etc. are discussed in detail. At last, the real time performance of the system is analyzed. The experimental results show that the JPEG2000 system achieves competitive performance with both extremely fast encoding and decoding speed and excellent reconstructed image quality at very low bit rates. The image encoder and decoder based on the general high performance DSP chip has especial advantages of high reliability, small-size, fast data processing, low power consumption and flexibility.