Research And Implementation Of Vehicle Traveling Data Recorder

Accompany rapid development of society and economy, modem transports are playing more and more important roles. However, increasing traffic accidents cause countless casualties and property damage. Vehicle Traveling Data Recorder is a digital electronic recorder which can collect and store vehicle's running velocity, time, distance and other state information related. It can also transmit data via interface. Vehicle Traveling Data Recorder can hold out traffic violations, restrict drivers from bad drive habit, prevent traffic accidents from happening, provide scientific, veritable origin datum for tipstaffs to analyze and dispose accidents. It plays a very important role in transportation management.Nowadays, embedded technology is widely used in various fields. In our country, Vehicle Traveling Data Recorder is still using a single-chip processor with a unitary function. In this paper, we reference to a variety of different structures at home and abroad. Based on the design and research in different areas of the Vehicle Traveling Data Recorder, we present leading FPGA technology in traditional Vehicle Traveling Data Recorder. High-speed and low-power FPGA, with integration of new central processor and digital processor core, can carry out hardware and software co-design, and then reduce design time and improve integration, stability and flexibility of vehicle traveling data recorder.In this paper, we first introduce and analyze background and status of domestic and foreign Vehicle Traveling Data Recorder. Combine with project design, expected indicators of design performance parameters are preliminary proposed. And base on performance indicators, we determine main framework of system design. According to national standards of Vehicle Traveling Data Recorder and its expected performance, we propose a FPGA-based Vehicle Traveling Data Recorder design program. Hardware platforms and software development environment of this work is developed with FPGA technology by Altera company.Secondly, we descript overall system design, system hardware and software design in detail. The design highlights advantages of SOPC technology, builds hardware and software platform in internal implementation of a single FPGA, achieve development processes of each functional module of the system and interface between the system and each peripheral. In the part about software, we first describe flow of software system, and then describe the system's NiosⅡsoft-core processors and its development process in detail.Finally, we record the process of hardware and software adjustment and performance testing, analysis and optimize the results of experiment, and put forward prospects according to the test results.Design of the system brings fully functional IP cores which provided by SOPC Builder and NiosII soft processor. Therefore, we simplify circuit design of the system's hardware, make productive development focus on system function and algorithm design, improve design efficiency. Using FPGA characteristics of programming, we bring flexibility of circuit design and reconstruction of algorithm, let the system has good portability, and reveal scalability of the system. Experimental results show that the system operating stability. And testing results also show that each index of the system meets the basic requirements. And low-cost and low-power consumption of development of this system has strong competitiveness in the market.