Research On Variable Frequency Technology In AC-DC Controller

More and more electronic devices replace physical shutdown with standby mode. Thestandby power consumption of electronic equipment is becoming a very important issue. Andelectromagnetic interference has also become an important indicator of the electronicequipment. The standby losses and electromagnetic interference depend on the power supplysystem. Variable frequency technology can be a good solution to these two issues in designingAC-DC controller. After analyzing a lot of journals and technical topics, variable frequencytechnology is researched in this paper.In the first place, variable frequency technology for low EMI is researched. A frequencyjitter circuit with better capability in reducing the EMI of the switching power converter isdesigned based on three frequency jitter circuits. A clock is used in the pseudo-random digitalsequence to achieve a random control signal. This signal controls the internal oscillatorfrequency to reduce the EMI of the switching power converter. This technique could reducethe difficulty of the EMI design in switching power converter, and reduce the requirements ofpower supply design engineer. Then, variable frequency technology for low power isresearched. PFM modulation circuit is designed in light load condition; and the skip pulsemode circuit is designed in standby mode to achieve low power consumption. In order toverify the correctness of the research result, an AC-DC power management control chip withlow standby power consumption and low EMI feature is designed. The chip is designed basedon the CentOS4.8(x64) workstation, and Cadence ADE environment. The Episil1.0um40V/5V1P2M bsim3v3process model is adopted in the chip simulation. The AC-DC controlchip is designed with the ability of achieving low power consumption, high efficiency in avariety of load conditions and low EMI. The simulation results show the chip’s operatingmode changes with the different load conditions, to achieve the requirements of the chipdesign strategy. In the standby mode, light load mode, and overload conditions, the chipworks in the skip pulse mode, PFM mode, and PWM mode. This simulation resultsdemonstrate the feasibility and correctness of the theoretical analyses and design methods. Finally the design of layout is completed with the Episil1.0um40V/5V1P2M design rule.