The Research And Design Of A Low-Dropout Voltage Regulator IC Applied To Portable Electronic Products

Currently, in the main chips of the mobile device, the power management chip has beenpromoted to the top three. With The development and popularization of the portable products,such as laptop,3G mobile phones, MP3/MP4and so on, the power management for portableapplications is becoming a bright spot in the field of semiconductor, and Power Management ICtechnology has a significant progress,"Main chip+Power Management IC " model hasbecome the development trend. By the advantages of low noise, high stability, high powersupply rejection ratio，LDO regulator is widely used in portable electronic products, as anindependent power management IC, or as a module in the overall power management IC. Inrecent years, the market is changing, technology continues to progress, to further improve theperformance of the LDO chip is the inevitable requirement of the market and technology.The LDO regulator chip design process is systematicly introduced. Firstly, thedevelopment of the LDO voltage regulator and powermanagement chip is introduced, the basicworking principle and technical specifications of the LDO regulator chip are detailed, accordingto the actual situation, the technical requirements of the design are put forward. Secondly, Inaccordance with the bottom-up principle, module circuit design and system design come intoSub-level introduction, the question on the design of the various modules that should be notedare discussed in detail. In order to meet the requirements of the portable electronic device,P-type MOS transistor with an advantage in terms of conversion efficiency is used as powertube; the buffer with an adaptive frequency compensation is added to drive the large size of thepower tube to overcome the influence of the parasitic capacitance and improve the responsespeed; P-type differential amplifier with N-type active load effectively reduces the input voltage,and at the same time, the power supply rejection ratio is improved by introducing input voltageat the output; Using active load instead of the traditional resistive load, create a new chip testcircuit for a larger adjustment test current. Lastly, the circuit was simulated and verificated.Using CSMC0.5μm CMOS process, the LDO regulator chip is designed for portableelectronic products. The input voltage range of the chip is from3.2V to5.5V, the stable outputvoltage is typically3V, the maximum output current is up to300mA, the maximum load regulation is6%, the maximum linear adjustment rate is0.2%, the power supply rejection ratiois17dB@10kHZ. Compared with the traditional LDO regulator chip, the advantages of theLDO regulator chip designed in this paper are as follows:(1)the buffer is added between theerror amplifier and power tube, in this way, the transient response speed of the chip with anadaptive frequency compensation network is improved;(2)through the reasonable design of theerror amplifier, the input voltage and the voltage drop is sufficiently reduced and the conversionefficiency is improved;(3)The bandgap reference is no longer placed into the LDO regulatorchip, in order to save the chip area;(4)Active load instead of resistive load is applied to theinnovative design of test circuit, in all different load current conditions, the different technicalindicators are more conducive to test.