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Research And Design Of Electric Power System Clock Synchronization Based On IEEE1588v2Protocol

Posted on:2015-01-31Degree:MasterType:Thesis
Country:ChinaCandidate:M ZhouFull Text:PDF
GTID:2252330431453473Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of power industry, the number of electric power system automation equipments is increasing fast. Equipments such as transmission line fault location equipment, phasor measurement unit and power acquisition device, are all based on a unified clock. The unified clock becomes gradually important for the electric power system. The high-precision and high-reliability time synchronization network plays an important role for the stable operation of modern electric power system. Currently, most of the electric power systems configurate GPS receivers to get time information within a room of substations. GPS receivers do not have the ability of network management, which may cause many problems.GPS receivers are widely used, however, the sites cannot be shared, thus leading to a serious waste of resources.Once the GPS signal fails, punctual performance will become low, and the quality of synchronization will also drop. Only with a unified and accurate source of time,satisfactory performance of monitoring and fault analysis for each system can be achieved.IEEE1588v2is the Precise Time Protocol (PTP), which improves the synchronization accuracy to sub-microsecond level through the network in different synchronization accuracies, resolutions and stability of clocks.This paper firstly describes the IEEE1588v2standard. Then it discusses the PTP system configuration, protocol massages, working mechanism, PTP state machine and timestamp of event massages.It further presents the software realization of IEEE1588v2and the design of hardware platform based on "ARM+PHY" timestamp-marking method. Moreover, the hardware platform calls"STM32F407+DP83640".STM32F407is the main controller, and it is responsible for IEEE1588v2protocol engine, network protocol stack and low level drive.DP83640works for the calibration of the local clock and marks hardware timestamps for event massages.This research has completed the design and debug of PCB based on the "STM32F407+DP83640"hardware platform, software design of the engine of IEEE 1588v2protocol, transplant of the LwIP TCP/IP stack, development of the low level drive for STM32F407and DP83640, the calibration of local clock and the mark of hardware timestamps. Finally, the proposed system is tested and the experimental results show that the synchronization accuracy of software is500us. Moreover, the synchronization accuracies of hardware and point-to-point are11us and24ns respectively, which satisfies the need of electric power system.
Keywords/Search Tags:IEEE1588v2, Time Synchronization, DP83640, Hardware Timestamp
PDF Full Text Request
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