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Design Of A LDO Regulator With Supply Of Low And High Voltage

Posted on:2016-03-25Degree:MasterType:Thesis
Country:ChinaCandidate:S LinFull Text:PDF
GTID:2272330461972343Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the development of information science and technology and the variety of consumer electronics, personal PC, mobile phone, MP3, and car electronics products penetrated into every aspect of peopleā€™s daily lives. In the system of electronic equipment, the power management chip shoulder the mission of electrical energy conversion, distribution, testing and other electrical energy management. For electronic equipment, power management chip is irreplaceable, which directly determines if the electronic device can play its best performance. Today the international situation of energy saving also increase market demand for power management chip.Although power management chip is the power supply of the whole machine, but it also requires a power supply module inside to create the conditions for normal work. Power supply module requires good noise and ripple rejection, the function of precise instantaneous correction and output detection, lower power consumption and higher efficiency. In this case, low-dropout linear regulator (LDO) has become the best choice. Traditional LDO commonly used low-voltage devices, resulting in a narrow range power supply, the author improves in the base of traditional LDO architecture, the current offset and the input pairs use the low voltage power supply, while the folded-cascode and high power PMOS tube use the high-pressure pipe power supply, making the overall circuitā€™s power supply range is very large and can withstand 28V high-voltage, and the LDO output begins to follow when the supply voltage is 0.5V. Low dropout linear regulator has many indicators, and loop stability is directly related to the LDO if can work smoothly and efficiently, the author adopts the more advanced pole-pole tracking frequency compensation scheme, so that the output poles and the amplifier poles are related to the tail currents, in order to achieve the stability of LDO no matter in the case of light load or overload. As the secondary circuit, the author uses a thermal protection circuit to protect the LDO from high temperature.Based on BICMOS 0.5 Ī¼m BCD process, analyzed and simulated by Hspice. The LDO proposed by the author has the advantage of high gain, high PSRR (Power Supply Rejection ratio), low power consumption, fast response characteristics, the input voltage range is 5V-28V, the output voltage is 5V. Through analyzing and simulating by Hspice:This low-dropout linear regulator achieves-91dB of PSRR at low frequency,-2dB at high frequency, the line regulation is 0.002%, the open-loop gain is 86dB, the phase margin is 68 Ā°, the quiescent current is only 13.5 Ī¼A. Experimental results show that this structure is feasible.
Keywords/Search Tags:Power Mangement, Low Dropout Regulator, High And Low Voltage, Over-temperature Protection, Power Allocation, Frequency Compensation
PDF Full Text Request
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