Research And Design Of Low-dropout Regulator With Low FOM For SoC Power Supply

Low dropout regulator(LDO)has the characteristics of small chip area,simple peripheral devices,low power consumption,high precision and low noise,and is widely used for SoC Power Supply.Circuits modules in SoC are sensitive to the power supply voltage.With the high-frequency swithing of clock,these modules will generate hightransient-frequency load current,resulting in the fluctuation of input voltage,which may lead to the abnormal working state of the relevant circuit modules.In order to cope with the high-frequency and large-current load transient,and supply continuous and stable voltage efficiently,LDO is required for fast transient response ability,high driving capacity and small quiescent current,that is,LDO is required to have low figure of merit(FOM).The content of this article mainly involves the research and design of LDO with low FOM value.Through the research and analysis of the basic principles of LDO and the power supply requirements of SoC,3 LDOs with low FOM value are designed in this paper,all of which have been taped out under the 0.35 um CMOS process.The power transistor of the first LDO is N-type MOSFET(NMOS).By adopting dual power supply mode,it is not necessary for an additional charge pump to drive the power transistor.With the power recycle and active clamping technology,the loop bandwidth and the transient response speed during high-frequency load transient can be improved without reducing the current efficiency of the system.And thanks to adaptive frequency compensation technology,the LDO loop can maintain sufficient stability under different load conditions.The second LDO also uses NMOS as the power transistor.By adopting the overshoot dissipation technology,the LDO can quickly discharge the output voltage overshoot during transient,and quickly stabilize the output voltage.In addition,by using a floating ground buffer as the second-stage of the LDO,the slew rate of the gate voltage of the power transistor and the loop bandwidth of the LDO can be effectively enhanced,and the transient response speed will be accelerated without reducing the current efficiency of the LDO.Not only that,with the help of an adaptive compensation network,the LDO can meet good stability under different load conditions.The third LDO uses PMOS as the power transistor.The error amplifier(EA)adopts an advanced current amplifier and dynamic bias technology,which can significantly broaden the bandwidth of the loop without increasing the static power,thereby greatly improving the transient response speed.In addition,the dynamic reference voltage control structure(DRC)is embedded in the LDO,and the reference voltage is adaptively adjusted during load transient,which further improves the SR of the EA.