Research And Implement On Key Techniques Of 3GHZ Characteristic Impedance Tester Software

At present, as the clock frequency and the data transmission rate is getting higher and higher, PCB industry’s control of characteristic impedance is becoming more and more strict so as to preserve the integrity of the signal. Meanwhile PCB industry put more higher requirements on the bandwidth, stability and accuracy of characteristic impedance tester, PCB industry also is in urgent need of the multifunctional and more intelligent characteristic impedance tester software. This thesis was aimed at these problems and the research was starting from the key technologies of characteristic impedance tester software. The implementation was mainly focused on the bandwidth enhancement algorithm, clock jitter algorithm and enhanced two point calibration algorithm. Specific content are as follows:The bandwidth enhancement algorithm was researched and implemented. The bandwidth enhancement filtering technology was selected as the implementation plan on the basis of analyzing the bandwidth enhancement filtering technology and the digital bandwidth interleaved (DBI) multiplexing technology and their advantages and disadvantages. Through the bandwidth enhancement filtering technology, the frequency response’s-3 dB point of the instrument was improved to a higher frequency through selectively "zoom in" the high frequency components of the signal. The bandwidth of the instrument was ultimately improved from 2.3GHz to 2.97GHz through the bandwidth enhancement algorithm, consequently the instrument’s resolution was improved.The clock jitter algorithm was researched and implemented. The algorithm was based on the sequenced equivalent sampling and was implemented through the discussion of clock jitter analysis methods and it’s influence on sampled signal. Based on the relationship of the sampled signal and it’s average signal, the probability density distribution of the Total jitter (TJ) was calculated and decomposed into Deterministic jitter (DJ) and Random jitter (RJ), next the peak to peak value of Period jitter (PJ), Cycle-Cycle jitter(CCJ) and Time Interval Error (TIE) was calculated. Finally, the algorithm’s effectiveness was verified with the test results of Tektronix’s TDSJIT3 jitter analysis software as the reference standard, consequently the clock jitter algorithm provided a quantitative analysis method for the detection of instrument’s stability and provided the basis for subsequent hardware’s design of self-calibration circuit.The enhanced two point calibration algorithm was researched and implemented. The algorithm was improved from the two point calibration algorithm. There are three improvements. The first one is reducing the random errors with the average of sampled waveforms, the second one is improving the calibration accuracy through automatically choosing the best measurement area, the third one is improving the independence and consistency of different channels through configuring calibration parameters for each channel. Finally, the algorithm’s effectiveness of improving the test accuracy of characteristic impedance was verified with the test results of Tektronix as the reference standard.The function of channel extension and adaptive waveform display was designed and implemented. The software’s channels were extended from 2 to 4. The measured waveform can be adjusted automatically according to the actual situation of the device under test so as to display the whole waveform at the best position of the view, consequently the characteristic impedance tester can be more adaptable to industry’s large-scale pipeline test and hybrid intelligent test.In the end, the thesis analyzed the test results of software’s function, performance and exception conditions.