The Research And Design On Staggered Parallel Power Factor Correction Circuit With Soft Switch Technology

With the widely use of AC-DC converters in power electronic devices, harmonic pollution problem has drew people’s more and more attention. To reduce the harmonic pollution to power grid, many countries established the standard of input current harmonic suppression to maintain power grid’s operation. Input Power Factor becomes the key index to measure electrical equipments’performance. PFC is an effective method to eliminate harmonic pollution and improve the Power Factor. As power level has been promoted, the use of conventional PFC converters is restricted. Interleaving parallel technology is introduced into the PFC circuit to reduce current voltage stress of the power devices. Since the power electronic equipments such as switching power become more and more high-frequency and miniaturized, switching frequency increases. It intensifies the circuit of switching loss. This paper adopts soft switch technology as an effective way to solve the switching loss problem.Firstly, this paper introduces the present researches on Power Factor Correction in details, and describes advantages and disadvantages of active and passive power factor. Then, it explains the basic principle and control method of active power factor correction. Secondly, by making a detailed description of the basic working principle of several kinds of soft switch technology and switching circuits with zero current and zero voltage, this paper finds that traditional zero-voltage switching circuit has deficiency, and proposes a modified zero-voltage switching scheme. With the resonant network, the primary switch, auxiliary switch tube, diodes and other components can achieve soft switch, which will reduce the switching loss and the loss of diode reverse recovery to improve electromagnetic compatibility of the circuit. The introduction of the interleaving parallel technology can largely decrease power components’current stress. Finally, with the modified zero-voltage switching circuit and interleaving parallel technology, this scheme adopts Boost converter as the main circuit topology, the UC3854 controller based on average current mode, and the driving mode of phase-shifting staggered parallel circuit, respectively, to produce two lines of drive signal of the Boost circuit of main and auxiliary switch. This paper provides a staggered parallel zero-voltage switching Boost PFC circuit and figures out parameter settings of main circuit, control circuit and the resonance components.According to the circuit parameters, this paper uses PSIM software to make the simulation analysis of the circuit. By comparing with the existing schemes of the active power factor correction method, the designed scheme has been improved and optimized. This paper does a testing of the simulation circuit performance, and gets testing results. According to the testing waveforms and data, the designed circuit meets the design requirements very well.