Design Of High Precision Capacitor-Less LDO

Power management module plays a pivotal role in present electronic products,including low dropout linear regulator(LDO). LDO is widely used in all kinds of portable electronic products for its small volume, low power consumption, excellent performance in noise. With the rapid development of portable electronic products, LDO is also moving in the direction of System on Chip(SoC).The traditional LDO needs to be externally connected with an outer large capacitor,which undoubtedly takes up a large PCB space, and limits its application in portable electronic products. Capacitor-less LDO has become a hot research topic nowadays.External capacitor can provide charge and discharge charge at LDO output node as a charge storage element, which is good for the output voltage remains stable when the load current changes transiently. In addition, external capacitor equivalent series resistance(ESR) can build a left-half-plane zero to ensure the system’s stability. Without the external capacitor, capacitor-less LDO can’t keep the output voltage steady when the load current changes transiently. What’s more, capacitor-less LDO can’t keep the system stable.As a result, in the design of capacitor-less LDO, system’s stability and transient performance is huge challenge. In the third chapter, the two design difficulties are analyzed in detail.In high precision system, high precision LDO is essential. It is very important to improve the accuracy of the output voltage of LDO, which can improve the efficiency of LDO and the service life of the chip. The precision of the bandgap reference’s output voltage is most affected by the accuracy of the LDO output voltage. In this design, the bandgap voltage reference with high order compensation is used to provide the reference voltage of LDO with high precision and low temperature drift, so as to improve the accuracy of LDO output voltage. In addition, the Damping Factor Control(DFC)frequency compensation method used in the realization of system can ensure stability and transient response. Finally, the over temperature protection circuit is added to improve the reliability of the chip. The circuit was simulated in CSMC 0.5um CMOS process. By simulation with cadence spectre, within the range of input voltage 3.5V~5.5V, output voltage is 3.3V; dropout voltage 47mV; quiescent current 142 μ A; the load current range from 1mA to 100 mA, when the load current jump to 100 mA from 1mA or from 100 mA jump to 1mA in 1μs, the output voltage transients were less than 150mV; the powersupply rejection ratio is 65.1dB; the line regulation of 0.8%, load regulation of 5.5%. The circuit can maintain the stability whenever in the light load and heavy load.