Development Of Multi-functional Digital Faults Recorder Based On PCI-E

With the development of power system technology of our country, smart grid has become the mainstream trade. At present, the digital faults recorder, network recording analyzer and Digital relay protection tester are three independent devices. On some necessary conditions, all of them should be installed, which would be extremely heavy as well as expensive.The article developed a device called multi-functional digital faults recorder. On the basis of the digital faults recorder, it could realize the functions of digital faults recorder and network recording analyzer, and its hardware could also meet the need of digital relay protection tester. Further more, the device adopted the super-speed PCI-E bus, aimed at realizing the multi-function, integration, and high speed design of the device.The article studied the fault phase selection method based on the variation of phase current. An improved method was proposed, which combined the variation of the phase current difference and the phase voltage, constructed three generalized admittance which used to select the fault phase. The simulation results indicated that this improved method would not be influenced by fault location and the transition resistance, it could select fault phase correctly with high sensitivity. Therefore the method has good practical value.The article came up with the basic design scheme of the multi-functional digital faults recorder, and designed its hardware structure. The core of the structure is a single chip with a special embedded system, which has a DSP+FPGA core structure. The PCI-E bus was employed to satisfy the needed high speed communication of DSP external bus. Further more, The multiple board design solved the problems of large volume of data, too many network interfaces and point to point communication of PCI-E bus. The article analyzed the requirement of each part of the device and select appropriate element, and tested the speed of DSP bus and the interference of non-differential signal channel of high speed communication.The programming construct for transferring the network message such as SV, GOOSE, MMS was designed. Besides, the main modules, like MAC core, data multiplex switcher, clock handover, LVDS data transceiver, and PCI-E hardcore were designed. Some related simulations and the physical test of the matching method between PCI-E hardcore and dual-ports RAM were done. These designs solved the problems of the timing match, memory allocation, as well as the data distribution and summary when processing data.