Research And Implementation Of Parallel Digital Demodulation System Based On Digital Channelized Technology With Single Rate Filter Bank

Spectrum monitoring is the measurement of carrier frequency, energy and modulation types for the specific band signal. After detecting we usually need a digital demodulation step. This paper is centered on the digital channelized technology with single rate filter bank based on FFB structure, and the synchronization technology based on the CAZAC sequence. At last, the author implements the digital modulation signal monitoring and parallel demodulation.Firstly, the study of current spectrum monitoring, digital channelized, digital demodulation and virtual instrument is summarized. Thus, the importance of studying and realizing digital signal monitoring and parallel demodulation based on virtual instrument is presented.Secondly, we research on the theory of digital channelized technology, single-rate filter bank and quadrature digital demodulation.Thirdly, we research on the key technologies of digital channelized and digital demodulation. We analyze the rationality of using DFT to realize digital channelized, and then study the digital channelized based on STFT and its performance. At the same time, we research on FFB algorithm which can realize narrower transition bandwidth, higher sidelobe suppression ratio, and better frequency selective channel. We develop a low-latency FFB structure, when it’s performance same with the general FFB, the number of delays and complexity are lower. We design the CAZAC sequence, which can realize synchronization under the environment of big frequency offset channel, and simulated the synchronization performance.Finally, the parallel digital demodulation system based on digital channelized technology is implemented. We research on the efficient FPGA implementation scheme of related algorithm, include adopting the low latency FFB structure, using filter to replace cross correlator, adopting CORDIC algorithm to replace trigonometry. That saved the FPGA resources and improved the efficiency.To put it in the nutshell, we design a parallel digital demodulation system based on digital channelized technology. Then, we use ASK, PSK, PAM, QAM signal to test the system and compare the test results with the theoretical results to validate the correctness of the system.