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Desgin And Verification Of IEEE1394 Link Layer

Posted on:2016-08-08Degree:MasterType:Thesis
Country:ChinaCandidate:J QiFull Text:PDF
GTID:2308330482953344Subject:Software engineering
Abstract/Summary:PDF Full Text Request
With computer technology developing rapidly, the rate and reliability of bus are demanded more exigent than ever. As an advanced serial bus protocol, IEEE1394, with several outstanding advantages like smaller volume, high transmission speed, high reliability, asynchronous and isochronous data transmission, is widely used in many fields including home electronic products, multi-media, internet, storage-devices, aviation and spaceflight.etc.Firstly, the IP core design method for link layer which accords with IEEE 1394 protocol is proposed in this paper. It realizes the function of primary packet, phy packet and ack packet transmission. The IP core is divided into several modules, such as TRANSMIT, RECEIVE, LINKSM, CRC checking, PHYINT interface, Transaction FIFO interface, register INT_CTRL.etc. For improving the efficiency of packet transmission, the filterable process of receiving and sending error packets is promoted in this design. If a packet header has an error, the link layer will generate a reset signal to remove it in transmitting. If a packet payload has an error, the link layer will transmit it to phy layer after fixing it according to its header information. If a packet header has an error, the link layer will generate an error back indication signal to remove it in receiving. If a packet payload has error, the link layer will store this packet into transaction FIFO and generate an error indication signal.In order to improve the efficiency of verification, the most popular verification methodology UVM is used in this paper. The method of building up verification platform and verification plan is put forward with comprehensively considering the factors of verification complexity, verification essential and working environment sufficiency. According to the verification plan, the expected function of link IP core such as packet transmission and error packet filter is realized by 300 designed test cases. Questasim simulator results shows the link IP core achieve the function of link layer of serial bus protocol 1394 and filter error packet. At last, former verification of 1394 link IP core is assessed by coverage simulation.
Keywords/Search Tags:IEEE1394, Link Layer IP Core, Transmit, Receive, Verification Methodology
PDF Full Text Request
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