Design Of An Integrated Linear Voltage Regulator With Fast Load Transient Response

Low dropout linear regulator (LDO) is more widely used in portable electronic products. Since the application is simple, integrated LDO becomes the preferred variety of applications. Compared with conventional LDO, there is a big flaw on the transient characteristics for full-integrated LDO, it is the biggest challenges in its design for the transient characteristics, this is also the focus of the thesis.The transient characteristics and the factors affecting the transient characteristics for integrated LDO are analyzed in this thesis. Based on the important factors for affecting the transient characteristics, full-integrated LDO with fast transient response is designed in this thesis. The optimized error amplifier with lower power consumption at the same time not only provides a substantial increase in its large signal output current, and increases its DC gain. The issues of low loop bandwidth for the closed loop is avoided by auxiliary circuit. In the joint action of the two, when load current jumps, sufficient charge and discharge current for the gate capacitance of the power transistor in the possible shortest time is provided by the auxiliary circuit, the performance for transient response of the full-integrated LDO is improved effectively.Based on the above, the circuit of full-integrated LDO with fast transient response based on Chart 0.35?m standard CMOS process is designed in this thesis. Also, the simulation and layout is completed. The input voltage is 2.0V to 3.3V, the maximum load current is 100mA. The maximum undershoot voltage is 90 mV and 0.5% settling time is 1.1?s. The error of output voltage caused by the changes for the power supply voltage and load current is less than 0.05%, the quiescent current of the entire circuit is 19?A.