Research And Design Of A Sink And Source Large Current LDO With Fast Transient Response And High-reliability

With the rapid development of aerospace technology and nuclear physics,more and more chips need to work in the irradiated environment,there is the threat of performance degradation or even functional failure.T he highly reliable integrated circuits have been embargoed by foreign coun tries for a long time,and the key anti-irradiation reinforcement technology is also blocked by foreign countries.Therefore,the research on the irradiation effect and reinforcement design of integrated circuits has important national defense and moderniz ation significance.Double-rate synchronous dynamic random memory(DDR SDRAM),a type of synchronous dynamic random memory(SDRAM),can transfer data on both the rising and falling edges of the system clock.Compared to conventional SDRAM,DDR SDRAM transfers data at double the speed at the same system clock frequency.DDR SDRAM is now widely used in civilian applications such as laptop,mobile devices,and personal computers,while its applications are in memory for aerospace applications.For DDR SDRAM ap plications,this thesis focuses on a highly reliable low dropout regulator(LDO)with sink and source high current capability,and designs and implements a DDR LDO(RH9600)for conventional environment and a DDR LDO(RH9600＿SP)for irradiated environment.In order to obtain fast sink and source high current characteristics,a full CMOS transconductance-driven error amplifier is designed in this thesis.T his error amplifier converts the error voltage into error current,and then separates the error current f rom the direct current flow of the circuit and amplifies it in current mirror step by step through a designed current addition and subtraction circuit,which improves the transient response and reduces the static power consumption.In the circuit stability design,the error amplifier closed-loop gain curve drops to 0 d B and then bounces back to generate gain peaking,making the circuit potentially unstable.In this thesis,we propose a reasonable method to eliminate the gain peak ing by setting the secondary pole near the unit gain bandwidth to eliminate the gain peak ing in the Bode plot.In addition,in order to improve the reliability of the chip,protection circuits such as over-temperature protection,over-current protection,and under-voltage protection are integrated inside the RH9600.Based on the 180 nm CMOS process,the circuit design and test work of RH9600 are completed in this thesis.T he test results show that the quiescent operating current is 596 μA,the output voltage change is less than 40 m V when sink and source 2 A current,and the output voltage overshoot is less than 20 m V when switching from 1.5 A to-1.5 A within 0.75 ms.T he test results meet the design specifications.In order to meet the application requirements of DDR LDO in harsh irr adiation environment,this thesis combines the simulation method to study the total dose effect and single particle effect of RH9600,and designs an anti-irradiation reinforced DDR LDO chip(RH9600＿SP),and finally completes the post-simulation work of the chip.Firstly,the bipolar device based reference circuit is found to be sensitive to the total dose effect through simulation,and this thesis analyzes its influence mechanism and designs a reference circuit with anti-irradiation reinforcement to reduce the voltage change from 79.79 m V to 1.46 m V after irradiation.Digital cells in the circuit,logic flip-flops are likely to occur,leading to false triggering of the protection circuit.In order to improve the circuit’s resistance to single-particle effects,this thesis uses Muller-C cells to reinforce timing logic circuits such as flip-flops,and triple-mode redundancy to reinforce combinational logic circuits in critical paths.In addition,the layout is designed to suppress single-particle latch-up by widening the trap spacing and increasing the trap contact.The post-simulation results show that the output voltage of RH9600＿SP varies less than 8 m V with a load regulation rate of 2.75 m V/A when the output voltage is pulled with 3 A current.T he output vol tage does not overshoot when the output current transitions from 2 A to-2 A within 1 μs.