Research On Critical Circuit Techniques Of Fast-Transient LDOs For Mobile Devices

Mobile devices are widely used in our daily life,these devices mainly adopt the point-of-load power supply strategy,here each load has a corresponding cascaded Buck and LDO（Low-Dropout Regulator）for high-efficiency and high-quality power supply.The diversity of load conditions determines the variability of LDO’s design routes,therefore this submission focus on the design of low-power and fast-transient LDOs suitable for powering different load applications in mobile devices,and mainly including the following four contents.1.Fully integrated LDOs are widely used in on-chip systems due to their high integration.Conventional fully integrated LDOs usually use Miller Compensation for pole-splitting to ensure loop stability.However,the finite value of output pole in the conventional Miller-Compensation LDO usually limits LDO’s loop bandwidth.To address this problem,a P-LDO with Active Capacitor Frequency Compensation（ACFC）scheme is presented,where a larger equivalent Miller capacitance decoupled from the gate of power MOS is created by ACFC,which effectively extends the bandwidth of the local Miller feedback loop T_Miller（s）.With ACFC scheme,LDO achieves～4x bandwidth extension2.P-LDO with off-chip capacitor is suitable for powering applications with high input voltage and high load current such as Camera and Sensors.In these LDOs design,how to effectively drive the large gate capacitance with low power consumption is a design challenge.To solve this problem,a high-performance dual push-pull voltage buffer is proposed,the buffer can provide sufficient charge/discharge capability to the gate capacitance at the same time,overcoming the drawback of the conventional Super Source Follower（SSF）with insufficient positive Slew Rate（SR）.In addition,in order to realize the frequency compensation of LDO,an optimized dynamic Type-II compensation architecture that can suppress the Kick-Back noise is proposed.3.N-LDO（N-type power MOS）with off-chip capacitor is suitable for powering applications such as Flash Memory.Conventional N-LDO design suffer from buffer’s driving capability limited by quiescent current and Driving Dead-Zone at Error Amplifier’s output V_OE during high frequency load transient.To address these challenges,a novel power MOS driving technique TM-MOS（Transconductance Magnified MOS）is proposed to drive NMOS power FET at low power,and based on the load current sensing function of TM-MOS,an active clamp circuit is proposed to adaptively control the Driving Dead-Zone of V_OE during output overshoot period.4.Frequency response analysis quantifies the performance of LDO from small-signal perspective.Since conventional analysis method（directly calculate the complete transfer function）is quite complicated and elusive.In this thesis,local feedback loop analysis is adopted for frequency response analysis.Compared with conventional analysis method,this method simplifies the mathematical calculation and provides more design intuitions.All the three designed LDO chips are fabricated on CMOS platform.Experimental results verify the validity of theoretical analysis and circuit technique.