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Research Of Image Scaling And Image Quality Assessment Based On Reconfigurable Processor

Posted on:2015-05-28Degree:MasterType:Thesis
Country:ChinaCandidate:Z LiFull Text:PDF
GTID:2348330485993814Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the development of visual processing technology, more requirements of realtime processing and clarity of visual information are expressed. The existing computing architecture cannot meet the demands of the mass and high-speed data processing of visual information. With the advantage of its universality and efficiency for computing, the reconfigurable processor has been researched as a hot topic in the field of visual information processing. The core technology of visual processing based on the reconfigurable processor is to implement the algorithms related to visual information processing with configurable and parallel characteristics by taking full advantage of parallel computing capability of the reconfigurable processor.Basic architecture of the reconfigurable processor is introduced. By analyzing its characteristics and advantages, the reconfigurable processor is used to implement the complicated computation of image scaling. According to the features of the structure and the configuration of the general reconfigurable processor, bi-cubic interpolation algorithm is decomposed parallel and mapped on the array of the reconfigurable processor to generate the related operators. Compared with the existing processor, the performance of the operators based on the reconfigurable processor is evaluated. To assess the quality of the scaled image, the advantages and disadvantages of the existing image quality assessment methods based on the structure similarity are analyzed. An image quality assessment method based on multi-scale phase spectrum and the image gradient similarity is proposed. Then, the architecture of the visual information processing system based on the general reconfigurable processor is given. The functions of modules in the visual information post-processing subsystem are analyzed. The image scaling module is designed according to bi-cubic interpolation algorithm. This module makes the image which is the result of image mosaic implemented in preprocessing subsystem zoom in/out to the image whose resolution and mode are supported by the standard display devices. One output timing control module is designed to provide the line/frame synchronization timing to the chip-- CH7301 C, which can drive the chip to display the mosaic image on LCD.Bi-cubic interpolation algorithm is tested on Intel ATOM 230 test platform for its serial computing ability, and it is also tested on reconfigurable processor simulation test platform base on SoC Designer for its parallel computing ability. The results show that the computation efficiency using parallel pipelining method for key loop bodies is 24.6 times more efficient than that of using serial method. For the proposed image quality assessment method based on multi-scale phase spectrum and the image gradient similarity, many experiments are made on six image quality assessment(IQA) databases which are available to the public, including LIVE, TID2008 and CSIQ, etc. The experimental results demonstrate that the method proposed in this paper can achieve its performance of four criteria(such as spearman rank-order correlation coefficient) better than the other 8 related algorithms on 6 databases, which means it can obtain greater consistency with human subjective evaluation.
Keywords/Search Tags:reconfigurable processor, visual information processing, bi-cubic interpolation, parallel operator, visual information processing system hardware design, image quality assessment
PDF Full Text Request
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