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Research Of Visual Parallel Processing Operator Library Based On Reconfigurable Processor

Posted on:2015-07-25Degree:MasterType:Thesis
Country:ChinaCandidate:L C HuFull Text:PDF
GTID:2348330485993819Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Modern visual information processing is characterized by high real-timing, large amount of data, and high computational complexity. These bring a huge challenge to the performance of processors. Meanwhile, different standards and protocols of visual information processing require processors to be more flexible. Reconfigurable processor is a new kind of computing architecture which owns both the high flexibility of GPP and high performance of ASIC. It provides a valuable research direction for visual information processing. But there is a wide gap between visua l information processing algorithms and reconfigurable processor. How to map them on the reconfigurable processor array becomes a difficulty. But the operator library builds a bridge between them.This paper first introduces the multi-core processors and OpenMP parallel programming model, and analyzes parallelism characteristics of the visual information processing algorithms, so as to realize algorithm level parallel of them. And parallel program of the Harris feature point detection algorithm is designed. Secondly, on the basis of visual information processing algorithms parallelization, the characteristics of data flow and control flow of parallel loops are found. Then they are decomposed and refined, so as to realize operator level parallel of them, and the parallel operator library of the visual information processing algorithms is established. And the format specification of the operator library is designed in detail. Thirdly, two validation tools are developed: syntax rules check and functional results verification. The tool of syntax rules check can complete validation of the format specification of the operator library. The tool of functional results verification can complete output check of operator library. Finally, the Harris feature point detectio n algorithm is analyzed, and it is decomposed and refined into the basic computing unit. Then the operator level parallel of Harris is completed. A fast and accurate improved Harris feature point algorithm is proposed.The parallel program design of the Harris feature point detection algorithm based on the multi-core processor platform avoids the common programming errors, can achieve 1.59 speedup under the two threads and 3.33 speedup under the four threads. The established operator library makes up for the gap between the visual information processing algorithms and the reconfigurable processor. It is easy to transform from the algorithms to the configuration information by the operator library. The detection time of the improved Harris feature point detec tion algorithm is only approximately 8.7% that of the original Harris. The proposed algorithm has good detection quality, the average ACU is 0.8. For consistency evaluation of the rotated images, the average CCN is 79%. The rotation invariance is higher than Moravec, Harris and FAST, etc.
Keywords/Search Tags:Reconfigurable processor, visual information processing, parallel computing, operator library, Harris algorithm
PDF Full Text Request
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