Design And Implementation Of IP Core Of CPU Based On FPGA

Along with the reform of higher vocational education,higher vocational colleges in the education concept,teaching mode,teaching methods and undergraduate colleges and universities in the traditional way of education has produced a lot of difference.However,influenced by the traditional teaching ideas,many vocational colleges have not completely got rid of the shackles of the traditional education.On the other hand,it has not completely explored a higher vocational education which is suitable for China's national conditions.However,although it is to cross the river by feeling the stones,in the field of higher vocational education,many higher vocational colleges have done a lot of reform works.As far as our teaching method is concerned,we have accepted the traditional undergraduate education idea and method,when we go to the higher vocational colleges,it is also used to put this theory into higher vocational education.The teaching material we use is the traditional teaching material,the teaching method is the emphasis on theory,is often the first theory after practice.However,today's higher vocational education emphasizes the project oriented teaching method,although many teaching materials around the concept of adaptation,but it makes the knowledge point and therefore become scattered and not system,the lack of an effective teaching model.In view of this,the author in his many years of teaching EDA this course,design a FPGA based CPU IP core,its main purpose is not for the production of products,but for the project teaching,and explore a suitable for higher vocational education teaching mode.The main work includes the following aspects:(1)The user needs of the design are analyzed,and the practical significance of the model is described,and the corresponding analysis is made to the knowledge module of the teaching tasks involved in the model.(2)The integrity and the disassembly of the model are expounded,and the corresponding relationship between the system and the teaching task is set up.(3)A complete model is decomposed into a number of sub modules to design,using the hardware description language which called the Verilog HDL programming and implementation of each sub module,and the top-level module design.(4)Edit test platform Testbench to test the design of each circuit module,the simulation of the waveform after a brief analysis,to achieve the functional requirements of each circuit module.(5)In addition to giving a general design scheme,this paper also includes the design process,HDL source code and test results,simulation waveforms,etc..