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A Low-Power Capacitor-Less Low-Dropout Regulator

Posted on:2019-12-09Degree:MasterType:Thesis
Country:ChinaCandidate:Z A ZhangFull Text:PDF
GTID:2392330575475461Subject:Engineering
Abstract/Summary:PDF Full Text Request
The Low Drop-Out Voltage Regulator(LDO)is characterized by its simple structure,low noise,and small package size.It can provide a precise and stable operating voltage for the load and is widely used in portable electronic products.Since portable electronic products are powered by batteries,in order to reduce energy consumption and extend battery operating time,low power consumption has become its main development direction.On the other hand,because there is no external capacitor LDO that does not require a specific external capacitor,it does not require additional pins,which reduces the chip area and cost,which is beneficial to miniaturization of electronic products and has become a hot topic in recent years.The main concern of this paper is the research and design of low-power cap-less LDOs.Firstly,several key issues in implementing low-power,off-chip capacitor LDOs are carefully analyzed.Mainly for low-power LDO how to improve the load capacity,increase the slew rate,to achieve full load stability and cap-less LDO how to perform frequency compensation,improve the transient response and other research.The in-depth theoretical research and discussion on the four aspects of the design of the bandgap reference circuit,the improvement of the source output buffer stage circuit,combined frequency compensation with transient enhancement,and the implementation of over-current limit circuit,overtemperature protection circuit are carried out.Using the above theoretical research results,this paper designs a low-power no-chip external capacitor linear regulator with a buffer stage.Using UMC 0.11μm process,the operating voltage is 2.5V-3.6V,the operating temperature is-40°C-120°C,and the output voltage is 1.5V,which is used as the power supply for the digital circuit module.The main module of the circuit is a main circuit composed of an error amplifier,a buffer stage,a power transistor,and a feedback network,and a bias circuit,a bandgap reference circuit,and some auxiliary circuits such as over-temperature protection,over-current protection circuit.The error amplifier adopts a Class AB output op amp,and the buffer stage is a dynamic current offset negative feedback type source output structure,and add frequency compensation and transient enhancement devices.The final designed linear voltage regulator circuit has a maximum load capacity of 100 m A,a quiescent current of 16.5μA,a loop gain of 92 d B,the worst-case phase margin is greater than 60 degrees,gain margin 25 d B,the linear regulation is 0.78 m V/V,the load regulation is 0.007 m V/m A.Lad transient response time is approximately 2μs,and a transient output fluctuation of approximately 100 mV.The required output capacitance ranges from 300 p F to 500 p F and can be implemented on-chip.The maximum output current is limited to 300 m A.When the temperature is higher than 125 degrees,the overtemperature protection circuit starts.
Keywords/Search Tags:LDO, Buffer, Bandgap, Stability, Transient response, Static power
PDF Full Text Request
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