Design And Experiment Of High-Speed Digital Acquisition And Editing System Based On RS485 Bus Network

With the development of aerospace measurement and control technology,the number of acquisition and editing equipments working in the aircraft also increases,leading to a large amount of space occupied by test cables and connectors.At the same time,the traditional data bus has been unable to meet the significantly improved throughput.RS-485 has the characteristics of simple networking,fast transmission speed,long transmission distance and easy installation.Combining the functions of data acquisition equipment at present,this paper puts forward a kind of high speed digital data acquisition equipments based on RS-485 bus network,in order to satisfy the demands of miniaturization,high speed of data bus design,which means a lot to reduce vehicle weight and simplify cable.Data bus technology is generally used in spacecraft data processing system,this paper first introduces the common bus technology,analyzes the principles of reality needs,set up based on RS-485 bus network of high speed digital editing system,specifies the master node and multiple child node of the query/response mode,designed with the FPGA as the core of data acquisition,forward the overall frame and packaging solution.With the design principle of standardization and modularization,the function of the digital data acquisition system is divided into three modules: RS-485 Bus communication module,Ethernet interface module,A/D conversion module.After the block diagrams of each module are introduced in detail,the hardware design,FPGA design and simulation results are given.The bus network data acquisition system of one master node and 31 child nodes is built through the call of each module in the top-level design,the bus special communication protocol is developed.The acquisition and compilation format of multi-channel analog signals is introduced.The multichannel analog signal data acquired by child nodes are mixed framed as digital code stream and sent to the master node for storage.According to the requirements of the acquisition and compilation system test and verification,the communication protocol of the host computer docked with the acquisition system is designed,and the software of the upper computer is compiled for verification.In the end,system tests and functional tests were carried out on the system.The test results show that the rate of the data acquisition system could reach 3.3MB /s,the acquisition precision has reached the expected effect,performance of the system meet the requirements of the task.