| This thesis introduces the safety platform design and research of interval comprehensive monitoring system of Beijing swjtu-richsun technology co.,LTD.,.Through in-depth research on the comprehensive monitoring system of railway ground equipment,the main control module adopts the concept of "2-vote-2" to compare the results of driving,collecting and computing,thus ensuring the safety of the system operation.Railway signal system security platform is used widely in General speed railroad,most of them are with double channel,the 2-vote-2 architecture design,but for any channel,CPU(Central Processing Unit)should be exported through the parallel bus driving signal and gathering input state,but also with another channel of CPU operation result of comparison and validation,the CPU is high pressure.In the actual application process,it is easy to cause excessive CPU power consumption,thus causing the temperature rise of the board card,leading to abnormal CPU operation cycle,loss of communication data and other phenomena.In this thesis,combined with the above problems,the master control module was redesigned and designed,and the STM32(STMicroelectronics)and FPGA(Field-Programmable Gate Array)architecture is adopted for each channel,that is,each channel has two cpu for collaborative work.STM32 is responsible for the comparison and verification of data results with the CPU of another channel.Meanwhile,"task" is issued to FPGA through the parallel bus.FPGA interacts with the external drive,collection and communication board card through "command".STM32 gives out "tasks" and FPGA executes "commands",which fully reflects the powerful hardware acceleration function of FPGA and makes software and hardware play their advantages.This paper research content mainly includes: security platform main control module of requirements analysis,principle and design of main control module of hardware circuit principle of design and hardware circuit debugging,the FPGA logic design idea and design method of internal registers,and control of the FPGA design of peripheral interface card has carried on the simulation analysis,STM32F407 chip software design thought,the FPGA and the STM32 parallel bus communication and communication with the peripheral interface card debugging,this method reduces the difficulty of development,improve the running speed,the design method is more feasible,the result is more reliable. |