Study On Single Event Effect Pulse Fault Injection Model

The Single Event Effect of aerospace integrated circuits is becoming more and more serious with the progress of technology.Studying the Single Event Effect simulation methods is of great significance for promoting the optimization of aerospace integrated circuit design,improving the Single Event Effect experimental methods and improving the adequacy of the evaluation of the aerospace integrated circuit.Based on simulation tools such as Gds2mesh,Genius,Design Compiler,Finesim,etc.,this paper combines device-level simulation and transistor-level simulation to carry out simulation research on Single Event Effect.The main research work and results are as follows:1.Based on a set of advanced Single Event Effect simulation tools of Cogenda,a Single Event Effect device-level simulation method is built,and the implementation details of layout drawing,device modeling,high-energy particle transport simulation and device-level simulation are elaborated in detail.A 130nm NMOS three-dimensional device model was built using Gds2mesh and the initial state simulation was carried out.Genius simulation was used to obtain single event effect transient current under complex conditions?LET,temperature,incident position,drain bias,incident angle,particle type and energy?.Detailed analysis of the causes of differences in transient currents under complex conditions.The worst cases under each condition were obtained:LET?100 MeV·cm²/mg?,temperature?423K?,incident position?1.27?m?,drain bias?1.8V?,incident angle?60°?.The conditions other than LET are set as the worst case,and the worst single event effect transient current under different LETs is obtained by simulation.2.The four-parameter Weibull function model is deduced.The derivation results show that the peak value,width and change trend of current pulse can be uniquely determined by setting the four parameters t₀,a,b and c of Weibull function.The 1stOpt software was used to fit the worst single event effect transient current under different LET conditions based on four-parameter Weibull function and double exponential function.The average error of pulse peak and pulse full width at half maximum fitting based on four-parameter Weibull function was 4.13%and 11.68%,respectively.The average error of pulse peak and pulse full width at half maximum fitting based on double exponential function was as high as 42.91%and330.64%,respectively.The fitting results show that the four-parameter Weibull function has higher fitting accuracy,and the values of parameters a,b and c under different LET conditions are obtained.The worst single event effect transient current mathematical analytical model uniquely determined by LET values is constructed by numerical fitting method.The analytical model is implemented as a fault injection model for transistor-level simulation based on Verilog-A language and PWL.3.Single Event Effect simulation is carried out for SRAM six-transistor cell from transistor-level and device-level.The SRAM upset threshold value obtained by transistor-level simulation is between 0.545 and 0.548 MeV·cm²/mg,which is close to the experimental result reported in the literature of 0.5 MeV·cm²/mg,and the difference is less than 10%.The full physical model of SRAM six-transistor cell is built with Gds2mesh and device-level simulation is carried out with Genius.The simulation results show that the SRAM upset threshold is between 0.56 and 0.58 MeV·cm²/mg.Transistor-level simulation is in good agreement with device-level simulation and experimental results,which indicates that the fault injection model constructed is highly accurate.The anti-radiation strengthening mechanism of the ten-transistor cell circuit,the DICE cell circuit and the ROCK cell circuit is analyzed in detail,and through the means of simulation to verify and compare the reinforcement effect of the three circuits.The simulation results show that:?1?Under the130nm bulk silicon CMOS process,the ten-transistor cell circuit,the DICE cell circuit and the ROCK cell circuit can achieve the radiation-resistant reinforcement effect.?2?Among the three storage cell reinforcement circuits,the ROCK unit has the best radiation-resistant reinforcement effect,followed by the DICE cell,and the ten-transistor cell has the worst radiation reinforcement effect.4.Based on the research of Single Event Effect sensitive node extraction technology and Single Event Effect random fault injection technology,a supporting scale integrated circuits Single Event Effect transistor-level simulation method is constructed,which can select random sensitive nodes at random time to inject a configurable number of fault current sources,and the peak value and pulse width of the fault current sources are random within a certain range.Based on the research of fault injection model and transistor-level simulation method,the Single Event Effect transistor-level simulation for typical circuits?16-bit multiplier,scale is about 6000 transistors?is carried out.The simulation results show that:?1?The number of errors generated by fault injection for SUM signals and CO signals increases approximately linearly with LET,and the Single Event Effect sensitivity of SUM signals is stronger than that of CO signals.?2?The critical path is easy to be affected by Single Event Effect,resulting in functional and timing errors.?3?The number of errors caused by Single Event Effect to multiplier increases with the increase of frequency.?4?When the input signals are 16'H0000,16'H000F,16'H00FF,16'H0FFF,16'HFFFF in sequence,the number of errors caused by Single Event Effect in multiplier increases in sequence.The above simulation results conform to the action law of single particle and circuit,which indicates that the fault injection model and simulation method constructed in this paper are feasible.