Design Of Anti-single Particle SRAM Based On 28nm FDSOI Device

With the rapid development of my country’s aerospace technology,the reliability requirements of aerospace chips are getting higher and higher.Compared with bulk silicon devices,FDSOI devices have excellent anti-single event ability.Therefore,the anti-single event upset ability of SRAM built by FDSOI technology is improved.However,the anti-two-node upset ability of traditional reinforced circuits built with FDSOI is still very poor.This is aimed at this problem.This article focuses on the single event effect of 28 nm FDSOI and the anti-single event upset ability of FDSOI to build SRAM,and finally proposes a new type of reinforced circuit with full anti-single node flipping ability and basically full anti-two-node flipping ability.The main research content and results of this paper are as follows:1.The single event effect of 28 nm FDSOI was studied.I use Sentaurus software to calibrate the 28 nm FDSOI device of the 38 Institute of fet devices.From four aspects of single particle incident position,incident direction,drain terminal voltage,and single particle LET value,the single particle incident switch-off device is studied.The simulation research shows that the sensitive position of the device is close to the drain end of the LDD(X=0.032μm).Through the analysis of the sensitive position and the incident direction,the worst case of the single-particle large-angle incident device is obtained.Investigate the transient pulse current of the drain terminal of the switch-off FDSOI at different single event LET values under the worst case of large angles.This current is the ipwl current source for the sensitive node of the SRAM circuit.2.I study the impact of single particles on 6T-SRAM under the worst conditions at a large angle.At the same time,I research on the single event upset effect of the resistance,capacitance,8T-SRAM,DICE unit,RHU14 T unit reinforced circuit.First,Cadence is used to study the flip threshold and critical charge of 6T-SRAM in the worst case of a single particle at a large angle.The ipwl current source is made in Cadence to simulate the impact of a single particle on sensitive nodes,and the accuracy of the method is verified.The simulation results show that in 6T-SRAM,the switching threshold for turning off NMOS is0.09 pC/μm,the critical charge is 0.981 fC,the switching threshold for turning off PMOS is0.9pC/μm,and the critical charge is 2.53 fC.Therefore,the anti-single event upset performance of the turn-off NMOS is poor in 6T-SRAM.Finally,the research on the reinforced circuit is carried out,and the results are as follows: The resistance and capacitance reinforcement method is to exchange the layout area for an excellent reinforcement effect.The turnover threshold of 8T-SRAM at W/L=28/190 is 0.2pC/μm.DICE unit and RHU14 T unit have full anti-single-node upset ability and 1/2 anti-dual-node upset ability.3.Aiming at the shortcomings of traditional reinforced circuits with poor anti-single event upset ability,some new types of anti-SEU memory circuits are proposed,which are DICE-M,DICE-WD and DICE-M with increased stacked P tubes,and DICE-WD with reduced number of sensitive nodes.DICE-M and DICE-WD hardened circuits are proposed based on the principle that the DICE unit has excellent anti-single node flipping ability,the redundant point of the stable structure has excellent anti-single particle performance and the two mutually coupled inverters are the core unit of the memory circuit.Based on the principle that the stacked PMOS transmission weak 1 can reduce the NMOS conduction,it is proposed to increase stacked P tube for DICE-M.Based on the principle that connecting NMOS at both ends of the storage node can reduce the number of SRAM sensitive nodes,DICE-WD reducing the number of sensitive nodes is proposed.The simulation results are as follows: DICE-M with stacked P-tubes has full anti-single-node upset capability and 1/2 anti-dual-node upset capability,and its pair of dual-nodes will not cause other storage nodes to flip.DICE-WD,which reduces the number of sensitive nodes,has the ability to fully resist single-node flipping,and basically has the ability to fully resist dual-node flipping.