Hardware Platform Design Of The Transmitter And Receiver In Burst Communication System

Since the beginning of the 21 st century,information warfare has become the dominant factor in today's and future wars.In order to adapt to the future information warfare,various countries are making greater effort to develop militarized information technology in order to enhance their own preponderance in information warfare and take the dominant position in the war.The electronic warfare is the core in the information warfare.The interference and interception of critical information in military communication will cause severe loss in the war.Therefore,the anti-jamming and anti-interception performance of military communication has always been the priority of the information technology development.In order to improve the security performance of military communication,more antijamming and anti-interception technologies are currently used: frequency modulation technology,direct spread spectrum technology,encryption technology,diversity technology,and burst communication technology,etc.Among them,the burst communication technology is easier to implement than other technologies,and it has the characteristics such as short signal duration and uncertain transmission time,which greatly improves the signal antijamming and anti-interception ability.So burst communication technology is often used in areas such as military secret communication.This thesis is based on improving communication security performance,designs and implements the hardware platform of the transmitter and receiver in the burst communication system with high sensitivity and high receiving dynamic range.This thesis introduces the hardware platform performance requirements of the project in detail,and according to the requirements,the demonstration of the whole system design,the selection of chips for important modules,and the design and simulation of each module's performance are carried out.The hardware platform of transmitter designed in this thesis adopts the direct upconversion structure,while the hardware platform of the receiver adopts super-heterodyne down-conversion structure.At the same time,this thesis introduces the design process and scheme of each module in detail,and analyzes the advantages and disadvantages between different schemes.The design of burst communication system is described in this thesis which mainly includes:1.In order to realize the requirements of high sensitivity and high dynamic range of burst communication system at the same time,a solution of multi-stage amplifying high-gain receiving link and supersaturated sampling demodulation is designed for the platform of receiver.2.In order to solve the uncertain factors of the environment,a signal transmission scheme with variable transmission power is designed for the platform of transmitter.3.In order to improve the reliability of the hardware platform,various modules of burst communication system are simulated by EDA software.At the same time,based on signal integrity(SI),power integrity(PI),and electromagnetic compatibility(EMC),the cross-section structure of the PCB and the layout and routing of the device are rationally planned and designed.4.The performance index of hardware platform is tested,and the design scheme are improved and optimized according to the measured sensitivity,dynamic range and other performance indexes of the system.At the end of the thesis,the technical summary and prospects of work are carried out.The achievements obtained are concluded,also the shortcomings of the current design and the subsequent improvements are pointed out.