Research On High Frame Digital Image Acquisition And Transmission System

The acquisition and transmission of high-frame digital images has important applications in national defense security inspection systems.At present,Chinese research and discovery in the field of security inspection machines is in a period of rapid rise.With the development of technology,how to reflect the image information more quickly,clearly,and accurately on the host computer has become a problem not only for China but also for the world to develop security inspection technology.The semiconductor industry is growing rapidly today,FPGA and chip technology are also getting better.Targeting the advantages of FPGAs and the demand for high quality images from current security cameras.This paper designs and implements a high-frame digital image acquisition and transmission system based on the FPGA platform applied to security inspection equipment.The research content of this paper includes:First,the system has a modular design corresponding to the high frame rate digital image acquisition and transmission system used for security inspection equipment.It includes image data detection module,image data acquisition module and image data transmission module.The relationship between the three is that the physical image module converts the X-ray light signal passing through the measured object into an electrical signal and amplifies the charge through the charge amplifier.The amplified charge enters the image data acquisition module and converts the analog signal into a 16 bitsADC The digital signal processes the image data,converts it into a digital signal,and enters the image data transmission module to finally transmit the image data to the host computer through a custom transmission protocol and Gigabit Ethernet protocol.The system detects image data using a scintillator-based X-ray detector.It amplifies the charge using a 32-channel charge amplifier.It uses 16-bit SAR ADC for analog signal to digital signal transformation and logic design of charge amplifier and ADC.Second,the system has designed a chain transmission for the cascade of multiple data acquisition boards.It responds to the stability of cross-clock domain data transmission between multiple different acquisition boards.This module designs a handshake module and a multi-clock phase selection solution.This system adopts the method of preamble identification to design the way that the data of multiple data acquisition boards are aggregated to the data transmission board.Third,the system designed a Gigabit Ethernet module based on FPGA in the communication mode between the data transmission board and the host computer.It includes the design of the application layer,transport layer,network layer and data link layer in the Ethernet transmission protocol.This module uses the user-defined encapsulation format of full-duplex UDP/IP protocol to simplify TCP/IP protocol.It uses the RGMII interface to optimize the interface between the FPGA control chip and the network card PHY chip.The system completes the transmission of image data and valid instructions in the form of standard Ethernet data frames between the data transmission board and the host computer.This article is based on the CycloneV series FPGA chip of Altera company and the RTL8211 series PHY chip of Realtek company.It uses Verilog HDL hardware description language to complete the logic control and timing design of the high frame digital image data acquisition and transmission system.It uses Modlesim to complete functional simulation verification,uses Signaltap to perform board-level simulation verification,and uses wireshark to complete the verification of the accuracy and speed of Gigabit Ethernet data transmission on the PC side.This article finally realized the system from detecting the image on the conveyor belt to collecting the image data using the data acquisition board and finally using the data transmission board to transmit the image data to the host computer through the Gigabit Ethernet interface.