Design Of Gigabit Ethernet Image Acquisition And Processing System Based On FPGA

With the progress of society and the development of science and technology,image acquisition and processing system has been widely used in the fields of living entertainment,industrial production,medical health and so on.Traditional image acquisition and processing solutions are usually implemented by DSP or ASIC.These solutions are inflexible and complex in structure,which cannot meet the needs of high-speed image acquisition,long-distance transmission and real-time processing.Therefore,combined with the parallel data processing ability of FPGA,the characteristics of Gigabit Ethernet long-distance and high-speed data transmission,this paper designs a Gigabit Ethernet image acquisition and processing system based on FPGA to realize high-speed image acquisition,real-time processing and long-distance transmission.This paper mainly does the following research work:(1)Develop the design scheme of Gigabit Ethernet image acquisition and processing system based on FPGA.The system is mainly based on Altera’s Cyclone IV E series FPGA as the core,including the image acquisition side and the image receiving side.The image acquisition side uses the binocular camera OV5640 to acquire the image in real time,caches the image data through the SDRAM memory chip,uses the inter-frame differential method to detect the motion target in real time,and finally sends the image data to the image receiver side through Gigabit Ethernet.After receiving the Ethernet packet,the image receiver extracts the valid image data and sends it to SDRAM cache,and finally displays it through HDMI display.(2)Complete the logic design of Gigabit Ethernet image acquisition and processing system based on FPGA.System contain the logic design of image acquisition module,which includes initialization module,data acquisition module and image stitching module;the logic design of SDRAM data cache module,which includes FIFO control module,status control module,command control module and data read/write module;the logic design of Gigabit Ethernet transmit module,which includes FIFO cache module,data packet module and RGMII transmit module;logic design of Gigabit Ethernet receiving module,which includes RGMII receiving module,data unpacking module and image reorganization module;logic design of image motion target detection module,which contains grayscale module,inter-frame differencing module,median filtering module,morphological processing module and minimum surround box module.(3)Simulation tests and board-level verification of the system show that the modules are working properly.The system has been tested to complete real-time image acquisition with a resolution of 800*480 and a frame rate of 30FPS;Gigabit Ethernet transmits real-time images at a rate of 340Mbit/s;FPGA-based motion target detection algorithm works well,with high success rate and good real-time performance;the system consumes low power and does not take up much logic resources,and there is more excess for later maintenance and upgrading.The system completes the functions of high-speed image acquisition,real-time processing and long-distance transmission,which has practical application value.