The Development Of The Correlator On BD2/GPS System Based On FPGA

·The use of field programmable logic device (FPGA) has become more and morecommon, it provides the digital circuit design a very practical and reliable hardwareenvironment.This article Based on the FPGA development platform and used it to design andimplement the correlator which is the core components of BD2/GPS dual system receiver,composed an important part of the code tracking loop and carrier tracking of applicationprocessor, and to locate further solution. The main research work of the paper are summarizedas follows:The design and implementation of BD2-B1I frequency tracking channel. Use the ideaof modular design, emphasis design carrier NCO, carrier phase counter, complex phaserotation frequency conversion, code NCO, pseudo code generator, code phase counter, epoch,code correlator, accumulation and reset unit circuit.Various modules implementation byVerilog HDL language in FPGA, the simulation results show that each module parameters inthe tracking channel based on the FPGA implementation are consistent with the theoreticalvalue, the precision design meets the requirements.The design and implementation of registers and peripheral modules.Registers modulemainly includes carrier module registers, code module registers, integral accumulationmodule registers and system status registers, system control register. Peripheral module unitincluding the frequency heald configuration module, FPGA and DSP data bus interfacemodule, time base generator module.Each module implemented by Verilog HDL language inFPGA, the simulation results show that based on the FPGA implementation of peripheralmodules are working properly, satisfied the design requirements.The design and implementation of BD2/GPS dual system24channels correlator. For toimprove resource utilization and system compatibility, adopt the way of configurat usingsimilar module, such as carrier NCO, code NCO, etc., the experimental results show thatresource occupancy rate has certain decrease.The BD2/GPS double system correlator hardware testing and systemspeed.Experimental platform used by GNSS soft defined radio development platform basedon FPGA+DSP which development early by laboratory, based on MATLAB, completeBD2/GPS capture, tracking algorithm, the algorithm will be rewrite by C language, after thecompletion of loading to the DSP test double system correlator chips working conditions;Test results show that the dual system correlator can correctly handle BD2-B1I frequencypoints and the GPS L1signal, completing the process of capturing and tracking, andeventually get the navigation message.