| In the paper, on the basement of developing the motor control digital signal processor (DSP),The design thoughts and methods on core of DSP, special circuit for motor control, and testability design were studied form bath theory and practice as follows:(l)The 16 bits fixed-point DSP core that is the single emission and meets the algorithms of signal process and control was completed.(2)On the basement of the research on software and hardware methodologies which schedule the instruction concurrency's data dependence, conditional dependence, sequence control dependence, the gap between the question solution mode and machine solution mode in DSP , the instructions concurrency making the machine efficiency of DSP decreased. The new concept of concurrent function instruction of DSP are given .The thoughts include the operator which is the minimum unit of concurrent function instruction, the regulations composed of the concurrent function instruction ,the flow to realize the concurrent instruction to face algorithms of DSP. The thoughts of concurrent function instruction is aim to improve the efficiency of DSP machine. And facility soft compile. (3)The method of finite state machine together with PWM circuit is given to realize the algorithms of Voltage Space Vector control and 120 electrical angle changing phase control of DC brushless motor . The finite state machine controls the changed states of algorithms, the PWM circuit makes the controlled outputs of the states of algorithm. The method can be applied to other frequency conversion algorithm. The communication protocol stipulates the outputs of the data flow on the different communication protocol states, The finite state machine can control the changing states of the data flow, the outputs of finite state machine are used as data choosing and data allotting with the activation term, the common feature of such a method exists in communication circuits.(4)Establishing an unite interface of chip test and debug which embodies the boundary scan and complements the full scan. The boundary scan adopts the address ,data, control register together with instruction register to access relevant space , utilizes original circuit of core of DSP, decreases the cost of hardware ; Decomposing the full scan link into multi-scan links structure accord to the crossover test system, choosing the particular unit to firstly sent controlling signalsto turn on the different links, then the data are carried into the link, such a structure decreases the test applied time. Multi testability technical ways to different circuits successfully have active meanings for development of testability design technique. (5)As a sample of test of motor control digital signal processor ,The total test models of digital signal processor which cover the each functions of digital signal processor is given. The model include a series of concepts such as S-graph, codeword, simple fault, complex faults. The emphasis on 8+ and 8" faults models of the read and write registers instructions in the instructions test ; The each bit of control/statues registers has to be tested; MARCH B algorithm brought by software on boundary scan is used to test big registers stacks(include ROM and RAM) ;The relation of instructions is studied by the matrix between the real micro-operators obtained form the design of the core of digital signal processor and instructions; The test algorithm of 'read after write' in terms of data dependence, conditional dependence, sequence control dependence in the pipeline of single emission is given; Interruption section is tested in accordance with the interruption algorithm on the full scan link;...
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