Design Of The LDO Linear Regulator

The power management IC (integrated circuit) has many advantages, such as high integrity, high price ratio, the most simple outer circle circuit, the best capability, the high-efficiency power supply etc. So it has the vast market foreground. The LDO linear regulator circuit designed in this paper applies for those systems: ultra low power microcontroller, and any other low power processor. The general application includes MP3, DC, radiotelephony and the network of database, instrument etc. At present, the market of power management IC is still mostly occupied by foreign companies. As a result, it is of great significance to research and develop domestic power management IC so as to recapture a big market. It is therefore also of great importance to conduct such a study.The paper is aimed to design a LDO linear regulator. It adopts 0.5um CMOS technology, design ideas and the sub-blocks of LDO are expounded with a detailed elaboration on band-gap voltage reference with explicit design ideas and results. Applying Cadence Hspice, the sub-block circuits are verified. The simulation results indicate that the sub-blocks designed have met with their function object. In chapter five, system function is verified. The simulation results indicate that the designed have met with design requirement.It has the wide input voltage range (2V-5V), with an adjustable output voltage. When the load current is 300mA, the dropout voltage is lower than 300mV. In addition it also designs over temperature protection circuit and over current protection circuit. They are also adopted to guarantee the circuit work normally. This single chip management circuit is characterized by high efficiency, low power waste and simplified outer circle circuit, which decreases the cost of production to a great extent. At the same time, with a high capacity to regulate load, the chip can work normally under various conditions.