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Research On Testing Of Interconnect Structures In FPGAs

Posted on:2004-03-28Degree:MasterType:Thesis
Country:ChinaCandidate:H L WangFull Text:PDF
GTID:2168360095457118Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Field programmable gate arrays (FPGA) can be programmed in the field to implement any logic circuits of requirement from user. Because of their reprogrammability, they are good candidates for rapid system prototyping. They have also been used to implement many application-specific integrated circuits (ASIC). With the rapid development of FPGA, there are wide utilized in the field of computer, communication and graphic process. Most of the faults of FPGAs are caused by faults of interconnected structure, so diagnosis and testing for interconnected structure of FPGAs are important. With the rapid development of FPGA, certain technologies about fault testing on FPGAs have developed rapidly. Diagnosis and testing for FPGAs have also been studied by many researchers. However, in most published works, only the diagnosis of logic blocks is discussed.The diagnosis of fault routing network is considered in some cases, where switching matrices are diagnosed individually. An FPGA usually consists of complicated routing structure, It may not be easy to apply tests to individually components. In this paper we will present and diagnosis procedures for general interconnect faults in FPGAs.
Keywords/Search Tags:FPGA, testing and diagnosis, interconnect structure, fault model
PDF Full Text Request
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