Data Routing System Verification Based On System Verilog

As the system size and complexity increase exponentially, the shortcomings of the traditional verification environment in the reusability, flexibility and efficiency aspects have become more and more obvious, which make the traditional verification methods are no longer to meet the needs of verification. The huge pressure of validation force verification engineers to break through the traditional methods and develop the new verification technologies to improve verification productivity and ensure the quality of products.The main task of this paper is to complete the functional verification of the data routing system. So how to build an efficient system-level verification platform with flexibility and reusability is the key and difficult point of this paper.This paper gives a scalable hierarchical verification platform used systemverilog language based on VMM, effectively improving the adequacy and reliability of verification and validation efficiency and accelerating the project development process. The verification platform, referred in this paper, is controlled by scripts for functional simulation, which has achieved constraint-random stimulus generation, assertion monitoring, automatic real-time comparison for output data and coverage statistics. Meanwhile, the verification platform supports to change the constraints of random test vector, customize the automatic alignment mechanism on demands and add functional coverage points, to maximize the flexibility and reusability of the platform. What's more, the transaction-based modeling method has been used in this paper, so that, from the signal level to the transaction level, each level of the verification platform provides a range of services to its upper level and hides the details of the lower level through the abstractiion. There's only need to modify the constraints and scenarios for different test cases.The system-level verification platform has been applied to data routing system successfully and the simulation and coverage results are acceptable. The advantages of the VMM are fully reflected in the whole verification process, and the flexibility and efficiency of the advanced verification techniques, such as constrained random verification, assertion-based verification and coverage-driven verification are also fully reflected.The advanced verification methodology based on VMM and the advanced verification techniques provide a solid foundation for the increasingly complex system-level functional verification, which has a certain value for innovation and application.