Design Of Low Noise Fifth-Order ΣΔ Interface Circuit For Accelerometers

Micro-accelerometers have been widely used in automotive, biomedical and military applications. By introducing the accelerometer intoΣΔclosed-loop, digital signal can be directly obtained because of which micro-accelerometers have been considerably attactive.Designing a high orderΣΔelectro-machanical system is much more complicated than ordinary SDM (Simga-Delta Modulator). On one hand, traditional architectures do not have enough degrees of freedom and on the other hand the sense element has large parameter variations. In this dissertation, the discrete model of the sense element is first developed based on which different architectures ofΣΔelectro-machanical system are analyzed. Then the unconstrained architecuters for both single feedback and multiple feedback systems are proposed after which a detailed design procedure for high orderΣΔelectro-machanical system is established. Fifth-orderΣΔaccelerometer systems are designed according to the procedure. Theory analysis and simulation results show that the multiple feedback system has good tolarance to parameter variations of the sense element and better stability than the single feedback system. System level simulation in Matlab shows that the multiple feedback system has a peak SNR of 124dB and the noise in signal band is below -160dB.According to the system model, timing and circuit schematic is presented. The capacitive front-end is implemented using the switched-capacitor (SC) charge amplifier. The input device size of the operational amplifier in the front-end is optimized to minimize the input referred noise. Correlated double sampling (CDS) circuit is used to eliminate the low frequency noise and DC offset. Circuit modules like operational amplifiers and the comparator are designed to meet the system requirements. Circuit simulation in Spectre shows that the output noise is around -140dB which is 20dB lower than the previous fourth-order system.