Design Of High Performance Low Dropout Regulator For System On Chip Application

Based on the demand from System on Chip (SOC) application, two Low Dropout Regulators (LDO), including a high Power Supply Rejection (PSR) LDO and a capacitor-free fast transient response LDO, are presented in this work.In high PSR LDO part, firstly a high PSR voltage reference is implemented. Its features include:1) the output of bandgap core is directly put into the negative feedback loop, and the path between supply input and reference output is minimum, which is beneficial for high PSR design; 2) pre-regulator circuit is introduced between bandgap core and supply input, which increases the resistance of this path; 3) an extra high gain negative feedback loop is inserted at pre-regulator, which further improves PSR; all these designs ensures the voltage reference has sufficient PSR that won't limit the LDO's PSR performance. Then, according to error amplifier's influence to PSR of LDO system,8 different structures of error amplifier are analyzed, and N-DA+P-CS structure error amplifier is implemented here:it can transfer supply ripple signal to power transistor gate with a gain close to unity, which will eliminate almost all the supply ripple in gate-source voltage of power transistor, and improve LDO's PSR performance. Measured results show that under 300mA output current full load condition, this design achieves PSR -76.1dB at DC,-77.8dB at 1kHz.In capacitor-free fast transient response LDO part, according to the factors that determine LDO transient response performance, two transient enhancement block are introduced to LDO system:1) differentiator transient enhancement block, which monitors the overshoot voltage at LDO output:when overshoot occurs, differentiator loop will provide compensating current proportional to the rising speed of output voltage to the gate of power transistor, hence the slew rate at power transistor gate is improved, and LDO transient response performance is improved; 2) comparator transient enhancement block, mainly improves line transient response performance since differentiator loop's performance is low in line transient, provides compensation current to power transistor gate when output voltage exceeds the threshold. System post-simulation results show that:under 5μs edge line transient and load transient variation, the maximum overshoot at output of LDO is 102mV.