Design And Verification Of The Audio Interface IP Core That Based On AMBA APB Bus

With the improvement of design techniques and manufacturing technologies of the integrated circuits, SoC(System on Chip) has become one of the mainstreams in the VLSI field. SoC integrates a number of IP cores. In these cores,the audio interface IP core is used frequently. The technology of digital audio is developing very rapidly,and there are good many of digital audio interface specifications.And among those specifications,the I2S and S/PDIF audio protocol standards have a lot of advantages over other standards, for examples, their transmission is simple and convenient, they have flexible hardware architecture, etc. As a result, they have been widely used in many audio systems.This paper is based on the AMBA APB bus protocol, design and implements the IP core of the digital audio output interface ,which can completes the transformation of audio data from the APB bus to the I2S , S/PDIF and other audio protocols. Compared with other common audio interface, the design of this paper has the following features:1. The design is based on the AMBA APB bus protocol.At present,the AMBA APB bus protocol is widely used, IP cores that are comply with this specification will be explendid in the universalness and reusability.2. The design supports a lot of audio interface protocols,such as the I2S,left-justified format, right-justified format, S/PDIF protocol and so on.3. The design is Configurable in many aspects: the clock and frame synchronization can be configured,and so is their polarity; data format can be configured;the slot length in the frame can be configured to one of the seven types;the word length of the valid data in the slot also is configurable; the delay of the data start time that relatived to the frame synchronization can be set to 0,1 or 2-bit delay; the order of sending data can be set to start sending from the lowest bit or from the highest bit,and so on.4. The design has many functions: The design can handle inside all errors inside or outside of the module by mute , detect the clock to ensure the stability of the clock,and support the DMA transfer and CPU interrupt transfer.After finishing the design, I do the function verification,synthesize optimization and FPGA simulation to it.According to I2S,S/PDIF and other protocol requirements,builts the simulation verification and FPGA simulation platform, and do the functional simulation and timing verification to the design, and the results meet design requirements.In the synthesis, under the TSMC65nm technology library, uses Synopsys tools to do the DC synthesis, analysis and modification for the design.The system clock frequency(means the clock frequency of AMBA APB bus) can finally up to 400MHz or more, which meet the design requirements. And it can according with the requirement of the audio interface's sample frequency,including 32KHz,44.1KHz,48KHz,96KHz and 192KHz(it can be configured by user),which meet the requirement of the design. The design can support multiple audio protocols, and it can be flexibly configured in the applications. The design in this paper is a reusable IP core of the audio interface,and it can be used in the design of audio-related chips, especially can be integrated more easily in SoC chips that based on AMBA bus protocol.At present, the design has been successfully applied to the design of the SoC chip to which the project belongs.