Digital Audio And Video Of The Amba Bus-based Soc Design

Being an important means for humans to get the information from exterior just as the ears and eyes do, the multimedia processing of video and audio is now becoming one of the most important fields in the digital information age. The multimedia player with good quality and high resolution is now prevailing the market, and the key point lies in whether the CPU, which is the core of the player, can sustain the decoding of high quality video and audio source.This thesis presents a CPU+DSP decoding system structure according to the development of System on Chip(SoC), and gives a simple introduction to the modules on the platform, and it also thoroughly analyses the design of IP-memory controller which is the key point in the system, lastly, it validates the feasibility of the system platform structure by system simulation and testing in FPGA.The thesis mainly focuses on the following aspects: Firstly, study the system structure of video and audio processing chips of the same kind; read specification of product, such as PXA27x of Intel and Au1200 of AMD; study AMBA specification (Rev2.0), and find out the functions of the modules in the system.Secondly, establish the particular design criterion of the SDRAM controller which includes building plan of module testing platform; read and translate the specification and the user guide of MPMC, and also build up the self test platform.Thirdly, establish the bus frame and participate in argumentation of the blue point of the SoC system platform; compose the sub-system verification specification which includes the verification plan and target, and take charge of building the verification platform of MPMC sub-system and the coding of stimulus for self test platform. Fourthly, take part in debugging of FPGA verification platform, and take charge of the MPMC module in Demo; assist others in IP verification and modification.Finally, the FPGA Demo of the system platform has been checked and accepted.