Research And Design Of Low Dropout Regulator With PSRR Improvement

With the rapid development of analog integrated circuits and semiconductor manufacture technology, it makes the chip smaller and reduces its cost, at the same time brings a range of difficulties to IC designers. With the decrease of semiconductor manufacturing technology’s critical dimensions, the chip’s input voltage is gradually reduced and the chip can withstand less noise. In this paper, we propose two low dropout voltage regulators with high PSRR characteristic. The first chip use off-chip capacitor with High PSRR. It has high power supply rejection ratio at low frequency.Since at relatively high frequency is usually not satisfied because of this RF(Radio Frequency, RF) circuit requirement, it is necessary to improve PSRR. The second is on-chip capacitors LDR with High PSRR. It is different from the first chip at the high frequency. It introduces a high pass filter to enhance the chip’s PSRR. Because of the introduction of the high-pass filter in the circuit, the voltage applied to the gate small signal gain of the power MOS is also 1.Taking into account of the fact the channel modulation effects, it should be slightly greater than the value 1. During its design process, there are three main important factors to be considered. Firstly, the quiescent current of the whole circuit and static power. Secondly, the stability of the whole low dropout regulator loop. Thirdly, PSRR of LDR needs to be improved. And because the PSRR of the bandgap voltage also has a great impact to the entire circuit, so the bandgap voltage’s power supply rejection ratio is better 20 d B than the average low-dropout voltage regulator. Otherwise the bandgap reference will affect the power supply rejection ratio of output voltage.This paper presents two low dropout voltage regulators with high PSRR. The LDR with on-chip capacitor is manufactured by using 40 nm process, and has the results of simulation and test results. The input voltage is 1.4-3.6V and the maximum output load current is 200 m A. The simulation results presents that its PSRR can reach-60 d B before the frequency 1 k Hz, but it reduces to 0d B soon. The test results of the output voltage is about 1.1V. At the frequency 1 k Hz, its PSRR is-49 d B, the test results can basically satisfy the parameters. The PSRR of off-chip capacitor LDR are able to achieve-60 d B before 1 k Hz, and reach-50 d B at 1MHz. It is not difficult to find that the power supply rejection ratio is significantly improved at high frequency of LDR with off-chip capacitor.