The Design And Implementation In The VDR Compress System Of Audio Signal Based On FPGA

With the development of world economy,business transaction between worlds is more and more.With the rapid development of the shipping industry,some shipping accidents are inevitable.In order to analyze the accident and analyze the cause of the accident after the event,the important information of the ship should be recorded.VDR(Voyage data recorder,VDR)can record important information of ships when it is sailing,including the date and time,position,speed,cab sound,voice communication,radar data,echo sounder,alarm and so on.This paper focuses on audio signal processing,Because of the limitation of the memory size,how to manage the data safely and effectively is very important and practical.This paper deals with the compression and storage of the audio signal.The main work is divided into:This paper uses NEXYS4 of DIGILENT as the main development board.Board integrated XC7A100T-1CSG324C chip Artix-7 series of Xilinx.In this paper,MAX9812 is selected as the voice signal acquisition and amplification module,MAX9860 is selected as the analog to digital conversion module,CH372 is selected as the USB transmission module.It realizes the functions of acquisition,analog to digital conversion,compression coding,transmission,storage and playback of dual audio signal.This paper analyzes the system architecture and speech compression coding of some existing VDR.In this paper,the architecture of the system and the audio compression coding algorithms are analyzed,and their advantages and disadvantages are pointed out.According to the International Electrotechnical Commission(IEC)61996 document "ship navigation data recorder performance requirements,calibration methods and qualified test results",the overall design of this paper is determined.Overall design of this paper is that compression coding of audio signal in the FPGA chip parallel,the multiple data are cached,through the USB port for transmission storage.MAX9812 is used to complete the acquisition of audio signal.The analog-to-digital conversion is completed by MAX9860 that the analog signal is converted to 16 bit PCM signal by the sampling frequency of 44.1 KHz and the 16 bit PCM signal transmitted through the I2S bus.In this paper,the MPEG 1 layer II coding algorithm is used as the signal compression coding algorithm to generate a bit rate of 128kbs MP2 standard stream for transmission.The transmission of data is transmitted by CH372 module that USB communication protocol is integrated.Using FPGA to simulate its timing and using its built-in firmware mode for data transmission.Multiple data were packaged cache in the FPGA and individually storage in the host computer.The experimental results show that this paper implements the above functions and the system work stable and in real time.