Research On Synchronous Data Acquisition Technology Of Inertial Navigation System Hardware-in-the-loop Simulation

In the inertial measurement unit,the measurement accuracy of gyroscope and accelerometer is an important factor affecting the guidance rate.and the actual measurement of missile will consume a lot of manpower and material resources.Therefore,the real IMU is introduced into the simulation loop for the hardware-in-the-loop simulation of INS.By collecting the real-time data of IMU and turntable,the measurement error of gyroscope in IMU can be measured,and the accuracy compensation can be made accordingly.The frequent interruption of non-real-time computer in the simulation process makes it difficult to acquire the real-time data of IMU and turntable reliably and synchronously.Therefore,it is necessary to study a stable and efficient synchronous data acquisition equipment.This paper designs the synchronous data acquisition device in the hardware-in-the-loop simulation of INS,and determines the synchronous data acquisition scheme composed of the logic unit of the FPGA and the application program.designs the synchronous data acquisition device in the hardware-in-the-loop simulation of INS,and determines the synchronous data acquisition scheme composed of the logic unit of the FPGA and the application program.The design of the logic unit of the FPGA uses Verilog language to modularize the hardware logic from top to bottom,including serial port data receiving module,optical fiber data receiving module,synchronization error counting module,digital multiplexing module and combined data forwarding module.The two-way data synchronization receiving,digital multiplexing and combined data uploading are realized.The application program design includes the design of USB firmware program,host computer Winform program and MATLAB simulation program.It realizes the forwarding of circuit data,the receiving of USB data package,the control of the whole simulation process and the analysis of attitude error after the simulation.In addition,the system is modeled and the scheme of error detection is proposed.The m-sequence generator is designed in the FPGA to test the bit error rate of USB channel and optical channel.At the same time,the test environment was built.The performance of the synchronous data acquisition device designed in this paper was verified by the top-level simulation of FPGA hardware logic,board-level verification and system measurement in the laboratory environment.The test results show that the synchronous data acquisition device can synchronously collect and upload 280byte/10ms serial port data(baud rate is 921600bps)and 100byte/1 frame real-time attitude data of simulation turntable.The synchronization enror can be controlled within 1.11s,and the error code level can be achieved 10-10.It satisfies the requirements of Hardware-in-the-loop Simulation of INS,and has certain engineering significance for the development and testing of INS.