Design And Implementation Of Digital Energy Meter Based On FPGA

With the emergence and development of smart grids,digital power meters have been widely used in substations.Therefore,research on digital power meters has become a research hotspot.Although digital energy meters have been applied in real life and have mature technologies,there are still some problems in the application of substations.For example,the processing speed of large data is not fast enough,and the MAC address is not arbitrarily changed and other issue.The FPGA not only has the advantages of on-site programmability,fast data processing,real-time performance,and the ability to bring IP cores,but also is suitable for working at high sampling frequencies.It can be seen that it is very suitable as a CPU inside a digitized power meter that requires real-time control.This subject takes the substation digital power meter as the starting point.Then it describes the current IEC 61850 standard,the only protocol standard of the substation,and the IEC 61850-9-2 standard specification in detail.Finally,the system framework of the digital power meter based on FPGA was studied.It mainly includes two parts of the hardware circuit construction and FPGA logic design.In the hardware part of the circuit,first introduced the device and chip selection,and then the circuit is designed by Altuim Designer software,and finally,the hardware platform of a digital power meter which is based on the target chip EP4CE115F29C7 N,AFBR-5803 AT optical Ethernet transceiver and DP83849 IFVS physical chip was built.In the logic design part of FPGA,Using the Verilog HDL hardware description language to modularize the logic design of the digital energy meter-design sub-modules on the Quartus II 13.0 platform,and using ModelSim for module function simulation,as well as allowing the hardware circuit to pass around the SignalTap II to the FPGA.Finally,the hardware circuit and the FPGA logic module are integrated to complete the design of the digital power meter based on FPGA,and the existing device in the lab,the DE2-115 development board and the 100 M multi-mode optical fiber Ethernet Transceiver is used to build a simulation merge.The unit module verifies that the digital power meter designed in this topic basically fulfills its functions.