Research And Design Of Fast Charge Controller Based On USB PD Protocol

With the rapid spread of mobile devices such as smartphones and tablets,and the rapid development of mobile networks,the demand for electronic devices is increasing.The more powerful function and the bigger screen increase the battery consuming,therefore the battery life problem becomes an obvious short board of most electronic devices,which also tends to bring great inconvenience to the users.However,compared with the rapid development of electronic technology,the development speed of the battery is quite slow,and the lithium-ion battery technology is still dominant.Various electronic equipment manufacturers are also constantly introducing various solutions for short-lived problems.Before a revolutionary solution for battery power storage,increasing the efficiency of battery charging and shortening the time of charging seems to be a good assumption.Based on the xad9002 fast charging project of the author's internship company,this thesis completed the research and design of the USB PD controller in the USB PD fast charger.USB PD(USB Power Delivery)is one of the current mainstream fast charging protocols.It is a fast charging specification developed by the USB-IF organization.The USB PD increases power delivery through USB cables and connectors,extending cable bus power in USB applications.The core of fast charge implementation is power negotiation between the power supply terminal and the power terminal through the PD controller,so that the power supply parameters can meet the maximum specifications that the power terminal can withstand.First of all,this thesis studies the principle and implementation of PD fast charging by deeply studying the USB PD protocol.At the same time,the structure and function of the three parts of the insertion detection,physical layer and protocol layer in the PD controller are studied.According to the requirements of the agreement,the design of the controller physical layer transmitter and receiver was completed using Verilog HDL language.The transmitter mainly includes a 4b5 b encoding module,a BMC encoding module,a crc32 computing module,a transmitting state machine module,and the like.The receiver mainly includes a BMC decoding module,a shift control module,a 5b4 b decoding module,a crc32 check module,a receiving state machine module,and the like.The above design module can realize the coding,decoding,verification and transmission of the PD communication data by the hardware circuit.The function verification of the hardware circuit of the physical layer is verified by VCS,and the correctness of all the above design modules is confirmed.The controller insertion detection and protocol layer design is completed in C language.The protocol layer is divided into two parts,a sending module and a receiving module,according to the functional requirements,and implements functions such as insertion device detection,communication packet configuration,data packet parsing,and data packet information processing.Finally,the design is burned to the FPGA,the verification platform is built,and the board level test of the controller is completed.The communication data packet configured by the protocol layer is used as a test stimulus,and the charging process is simulated by the simulator and the PD tester,and the test results are analyzed by using a logic analyzer,a PD protocol analyzer,and an oscilloscope.The test results show that the hardware circuit handles the data packet correctly,and the power negotiation process and protocol requirements of the power supply end and the power supply end are consistent.The voltage of the CC line is 1V in operation.There are five kinds of power supply parameters that can be provided at the power supply end,which are 5V/3.03 A,9V/2.39 A,12V/2.31 A,15V/1.91 A,20V/1.83 A.