Anylasis And Design Of Low Dropout Regulator With Fast Transient Response

Low Dropout Regulator(LDO)is widely used in both on-chip systems and highperformance power scenes due to its low cost,low noise,high accuracy and simple peripheral circuitry.With the rapid development of integrated circuit system,the status of power management chip(PMC)in the integrated system is more and more important.The popularity of consumer electronics,wearable equipment,automotive electronics and medical devices makes the power management chips be used widely.Due to the complexity of the application and requirements of low power design,the load current of(PMC)changed rapidly in a short time.This requires PMC to respond quickly to changes in load current and keep the output voltage stable.This thesis mainly concerns about the analysis and design of transient response of LDO.Based on the research of the transient response of the current LDO and the analysis of the basic principles,two LDOs with fast transient response are designed.The first LDO uses a new loop control mode to drive the NMOS power transistor,with the internal integrated charge pump circuit(for driving a low current servo amplifier).There is a huge capacitor,which suppresses the high frequency noise of the charge pump oscillator,between the output of error amplifier and the gate of power transistor.The driving current of the power transistor in the transient response is provided entirely by the error amplifier,which is directly connected to the internal low voltage supply instead of the charge pump.In order to reduce the overshoot voltage and the large recovery time in transient response,LDO integrates over voltage correction circuit.The circuit detects the overshoot voltage and provides an additional discharging path for the output node to ground,when the output reaches a certain threshold.The circuit is simulated and taped out.The load current is switched between no load(0A)and full load(200mA)at the slope of 255mA/?s.The test shows that overshoot is 64 mV and undershoot is 98 mV.Another chip is mainly used to power DDR(Double Data Rate)memory.The translinear loop structure of class AB op provides a high slew rate.The output current varies between-1.5A and 1.5A at a slope of 150mA/?s,with overshoot of 65 mV and undershoot of 48 mV.The internal overcurrent circuit can accurately clamp the maximum load current at-2.6A and 2.6A.