Study Of Single Event Effects On FDSOI And 3D Stacked SRAM Devices

With the development of integrated circuit technology,more advanced processes such as Fully Depleted Silicon on Insulator（FDSOI）and 3D Stacked are applied to integrated circuits.The SOI process can immunize Single Event Latchup（SEL）due to all-dielectric isolation.FDSOI devices have attracted much attention in the field of anti-SEE radiation resistance due to their very small sensitive volume.On the other hand,the 3D Stacked integration technology has a higher degree of integration.Stacking multiple chips in one package can significantly improve memory density while maintaining high performance.Multi-layer stacking of stacked devices’active region results in three-dimensional distribution of the sensitive volume.Compared with the flat distribution of the sensitive volume of single-layer devices,the irradiation effect of stacked devices differs from that of single-layer devices.When the middle layer material of stacked devices decreases the energy of heavy ions,more energy is deposited in the second layer device.The capacity of FDSOI devices to anti-SEE and the high integration of 3D integrated devices are important requirements of aerospace microelectronic devices.Therefore,it is of great significance to study the mechanism of radiation effect and reinforcement measures of the two advanced devices.In this paper,a 22 nm FDSOI SRAM device and a 65 nm silicon stacked SRAM device with double stack structure were simulated by using HIRFL.Using SPICE simulation software,the perturbation of the transient pulse generated by heavy ions in22 nm FDSOI SRAM cell circuit to the node potential was studied.The main research results are as follows:（1）The Single Event Upset（SEU）cross section and the Multiple Cell Upset（MCU）ratio of 22 nm FDSOI SRAM depend on the LET value and incidence angle of heavy ions.With the increase of heavy ion LET,the proportion of MCU also increases,with a maximum increase of up to 20%,because the increase of LET will lead to the increase of the center charge density of heavy ion track,and the ionization track size effect will be more serious.It is found that when heavy ions incident along the device well,the ionization charge forms a stronger electric field in the device well region,and the transient pulses generated by heavy ions in the sensitive volume of the device are stronger,which have a greater impact on the device.As a result,the SEU cross-section difference between the two azimuths reaches 130%,and the MCU ratio difference between the two azimuths reaches 15%at an inclination of 30°.At the same azimuth angle,the inversion cross section with 60°inclination and the MCU ratio increase by150%and 10%,respectively,compared with the vertical incidence.The larger the inclination,the longer the energy deposition path of heavy ions in the well region,which is cosine to the vertical incidence,results in more holes trapped in the well region,thus resulting in more severe Single Event Effect.（2）The SPICE circuit-level simulation of the 22 nm FDSOI SRAM cell is carried out.The calibrated double exponential current pulse model is used to simulate heavy ion incidence.The influence of transistor driving capability on SEU threshold of the logic circuit is studied from the circuit level.The results show that the stronger the transistor driving capability,the stronger the potential pull-up or pull-down capability of the open state transistor,the higher the SEU threshold,which is attributed to the driving capability being proportional to the SEU critical charge of the device.In addition,a radiation-hardened 10T SRAM cell was designed with circuit-level reinforcement,and the SEU LET threshold of the 6T SRAM cell was changed from 4Me V·cm²/mg increased to 70 Me V·cm²/mg.（3）The influence of heavy ion parameters on single event effect was studied for65 nm DICE reinforced double-layer stacked SRAM and single-layer SRAM devices with the same process and same reinforcement.It was found that the type,range,angle and LET of heavy ion would have a significant impact on the SEE radiation response of stacked devices and single-layer devices.When the ²⁰⁹Bi ion LET is 35.6Me V·cm²/mg,the stacked device is more sensitive than the single-layer device,which is attributed to the higher LET of heavy ions reaching the second layer of the stacked device after the energy reduction of the middle layer material.The azimuth effect of stacked SRAM with DICE structure is very obvious.At the same inclination angle,the difference of SEU cross sections for heavy ion incident at different azimuths reaches five orders of magnitude.Under the same effective LET,the cross section with angular incidence differs greatly from that with vertical incidence due to the distribution of the sensitive volume of the device and the physical structure of the transistor.CRèME-MC simulation was used to analyze the difference of energy deposition in different layers of the stacked device.It was found that the energy deposition of heavy ions in the second layer of the stacked device was higher than that in the first layer,which was attributed to the increase of heavy ion LET caused by the energy decreased of heavy ions because of the middle layer material of the stacked device.In this paper,the SEE experiment and simulation results of 22 nm FDSOI SRAM are given.The physical mechanism of the radiation response of the device is analyzed in depth,the unit reinforcement structure of SRAM is designed,and the three-dimensional stacked devices are experimented and simulated.The mechanism for the difference of SEE sensitivity between stacked devices and single-layer devices is obtained.