Research On High-level Designed MCU

In digital circuits,control equipment is an important part of the entire design.In modern designs,microcontrollers(MCU)are generally chosen as control modules,and they also occupy a large market share.However,the competitiveness of domesticallymade MCUs is slightly insufficient,and in-depth research on MCUs is also very necessary.The main content of this thesis is the research of MCU based on high-level design.We use the more abstract hardware description language(CHISEL)and various EDA tools to complete the work.At present,most MCUs are based on Cortex series chips.However,as global demand continues to increase and many companies have invested in design and manufacturing,the drawbacks of the closed-source architecture gradually appear.On the one hand,its authorization fee is extremely high,which is difficult for ordinary enterprises to afford it;on the other hand,the initiative is always in the hands of others,and our development is easily restricted.In this thesis,we choose an instruction set architecture named RISC-V that has only emerged in recent years.This instruction set architecture has the characteristics of open source,and the architecture design is simple,which is suitable for development and research use.In the research process,the RISC-V architecture and the CHISEL hardware design language are analyzed at first,and the compilation platform suitable for the RISC-V architecture and the compilation platform suitable for the CHISEL hardware description language are built at the same time.Then we select the processor core based on Verilog from the official website of RISC-V,analyze the internal working principle and use CHISEL to realize the corresponding function.In the process of design,logic optimization and functional simulation tests are carried out.In addition,the 55 nm process library is used for logic synthesis to achieve the comparison between the CHISEL design and the original design.And the design is transplanted to the Zedboard platform for hardware testing and comparison.Finally,the custom instructions of RISC-V are studied.The single-cycle multiplication and accumulation instruction is added to the core,and the corresponding compiler tool and hardware design are configured to test the custom instruction.Through the research work of this thesis,the design of MCU based on CHISEL language has been completed,and various instruction tests and peripheral function tests have been completed,and the soft core design of MCU has been realized.In the comprehensive test of the 55 nm process library,the comprehensive area is basically the same,the operating frequency based on CHISEL is higher,and the performance is greatly improved compared to the original design.In the Zedboard test,the CHISEL design occupies less resources than the original design when setting the same frequency.In the custom instruction research,the instruction test program is generated by inline assembly,and the test is successfully passed,which verifies the correctness of the function of the custom instruction.