Research And Application Of FPGA-based Polynomial Multiplication Calculation Method

The polynomial multiplication is applied to many communication systems,signal circuits,and image processing algorithms.In the calculation of polynomial multiplication,the system is often required to process many data efficiently and output the results.The key to studying polynomial multiplication calculations is the application and operation of matrix multiplication.As the matrix multiplication structure is getting more complex,the efficient operation and calculation of large matrices are constantly facing greater challenges.Since the polynomial has the characteristics of variable,large-scale,etc.,only the software algorithm is still not sufficient to meet the actual needs.Therefore,there is an urgent need for a hardware acceleration platform to accommodate the increasingly complex expression of polynomial multiplication.With the continuous development of FPGA,large-scale integrated circuit manufacturing,memory interface and EDA tools,it is possible to apply the hardware platform to polynomial multiplication calculation.Based on the FPGA platform,this thesis describes the design and implementation of the polynomial multiplication computing platform.Aiming at the research of polynomial multiplication computing platform,the following work is carried out in this thesis:1.Based on the advantages of high efficiency and low energy consumption of the ZYNQ platform,the research established a hardware architecture of polynomial multiplication.The research is using the Hardware Description Language(HDL)to realize the design.And through the method of the pipeline and the data flow,the polynomial matrix multiplication is realized.On the hardware platform,the research was designed for the division of various functional modules.The research selects experimental data of different scales and carries out a polynomial multiplication matrix operation experiment on the designed hardware platform.From the analysis of operation results,the platform can well realize the matrix operation of polynomial multiplication.2.The research combined with the advantages of software and hardware platforms,it puts forward a kind of hardware and software collaborative design and validation framework.Through the design of this framework,it has realized the coordinated design,implementation and verification of software and hardware multiplication computing platforms,which are based on hardware platforms.According to the operation requirements,the research also realized the function of dynamically generating the parameters and the statements of the hardware platform.Through the operation of the software and hardware platform,the verification of the calculation results is implemented.In addition,the research combined with the advantages of the software platform,this framework provides auxiliary functions for polynomial multiplication hardware architecture,such as raw data generation,printout results and so on.Finally,through the experimental operation results and verification results,also combined with the statistical analysis of experimental data,the research can obtain a conclusion.In this thesis,these experiments are based on the FPGA platform.These experimental results show the operation in the polynomial multiplication computation platform is correct.Compared with the platform,which is only relying on the software algorithm,the developed platform has a shorter operation time and faster operation speed performance.In addition,the research also has simple applications in encryption and decryption algorithms,SAT problem-solving and so on.