Design And Implementation Of Universal Error Correction Filter In Wideband Oscilloscope Based On FPGA

With the rapid development of computer and information technology,digital signal processing technology is constantly improved and widely used in the field of instruments.With the high-speed processing capability provided by FPGA and ASIC as the main chip of signal processing,digital signal processing technology can be applied efficiently in digital oscilloscope,which plays an indispensable role in the process of high-precision signal acquisition and reconstruction.This paper mainly studies the universal design method of error correcting filter in oscilloscope in order to improve its reusability and flexibility.The main research content of this paper is as follows:(1)Demand analysis of universality of error correcting filter: By analyzing signal processing functions of oscilloscopes with different sampling architectures,it is concluded that error correction can be divided into nonlinear phase correction and linear phase correction,and the universality of different filtering functions in high-precision signal reconstruction can be realized through IIR and FIR.In this study,the order and bit width of the filter are designed parametrically to adjust the error of oscilloscope platform with different bandwidth and quantization bits.(2)Signal processing in the mode of large-capacity storage of oscilloscope: pipeline transmission mechanism is proposed,interrupt processing mechanism of the processing module is designed,and step by step backpressure control of the data cache module is adopted to ensure that the processing module can be correctly processed without data transmission loss in the case of rate mismatch.The introduction of pipeline back pressure mechanism improves the stability and efficiency of transmission.(3)Implementation of nonlinear phase correction module: IIR filters of time-division multiplexer and non-time-division multiplexer are realized based on the cascaded secondorder node structure.By dividing the state machine into two groups,the calculation time of time-division multiplexing IIR filter is optimized to 5 clocks,which greatly reduces the processing time of large-capacity data.(4)Implementation of linear phase correction module: Based on semi-parallel structure,a FIR filter with configurable multipliers for time-sharing multiplexing is realized.Through time-sharing multiplexing of multipliers,the tradeoff between resource occupancy and computing time is achieved in FPGA implementation.In addition,the resource consumption and quantization error of the filter are analyzed to guide the use of the filter.This paper tests the processing function of large-capacity data and proves the feasibility of pipeline backpressure and pause processing mechanism in processing largecapacity data.Through the full passband correction of oscilloscopes with different bandwidths,the compatibility of error correcting filter to different oscilloscope platforms is verified.FIR and IIR filters of different orders are configured for fractional delay,antimirror filtering and amplitude-frequency correction of DBI acquisition system,as well as nonlinear phase correction of overlapping band and full-passband phase-frequency correction.The results before and after correction are compared,and the correctness of the error correcting filter and the compatibility of different filtering functions are verified.