Sampling Transport Process Level FPGA-based Network Of Distribution Busbar Protection

As the future direction of the grid, Smart grid has been penetrated into every aspect of electric power, such as the generation, transmission, transformation, distribution, consumption, scheduling, and communication of information and so on. Above them all, the smart substation is undoubtedly the core of all parts. Smart energy substation evolved from the digital substation, and is one of the key components of the construction of strong smart grid, while the process layer network communications is also an important foundation for smart substation construction, which is directly related to the timeliness and reliability of station sample datas and switch control information, as well as the prerequisite for the stable operation of the protection devices in the spacer layer.The needs for special protection of low-voltage systems has been more and more urgent. While since the special situation of the distribution network, the right protection modes which are suitable for high systems can not be directly copied over, and thus the protection measures for low-voltage distribution network remained to be reaserched. As one of the outstanding representative of electric field, Nanjing Automation Co., Ltd. is advanced and exemplary in some degree. This paper is based on the projects of PS690U series low-voltage protection devices of Nanjing Automation Co., Ltd.. The distributed fiber differential bus protection system based on IEC61850standard is researched in this paper, and the problems about the transimission of sampling data sets in process layer and the connection of control bus, and the configuration modes of FPGA etc. are discussed as well. In the new system, the ethernet communication fuction is added to the existing hardware platform, with the help of fober communication technology. Based on this architecture, the sampling datas from the branch protection devices can be-transmitted to the central differential protection device in the spacer layer through an ethernet switch synchronously. It is estimated that the operation time of this protection system can be limitted to30-40ms.The Cyclone IV E-type Series FPGA device from Atera is used in this project, and with the connection of IP cores in FPGA, an embedded ethernet hardware platform is built. And on this platform, the sample data sets are transmitted in the format of IEC61850-9-2packets to the Ethernet switch. The packets captured by the software of Commview have been nalyzed, and the result shows that the received packet matches the sended messages well. In addition, another test method has been applied at the meantime, with the access of three-phase power source voltage analogy signals which are applied by DK-51standard test source device, the SMV message is displayed in the screen of Bo, ZF802, and the resolved voltage signals show a good coherency with the set voltages.